View EFR32MG1P632F256IM32-C0_8801535.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

efr32mg1 mighty gecko soc with integrated serial flash data sheet the mighty gecko family of socs is part of the wireless gecko multi-protocol portfolio. the efr32mg1x632 and efr32mg1x732 mighty gecko ics integrate a 512 kb serial flash in the package to support over the air updates. this 5x5 qfn32 package is ideal for space constrained products that need to support zigbee, thread, ble and propriet- ary networks. mighty gecko applications include: key features ? 32-bit arm? cortex?-m4 core with 40 mhz maximum operating frequency ? scalable radio configuration options available in qfn32 package ? 512 kb co-packaged serial flash for over the air updates ? 12-channel peripheral reflex system enabling autonomous interaction of mcu peripherals ? autonomous hardware crypto accelerator and random number generator ? integrated 2.4 ghz balun and pa with up to 19.5 dbm transmit power ? 125 c operating temperature ideal for connected lighting applications ? connected home ? lighting ? home and building automation and security timers and triggers real time counter and calendar cryotimer timer/counter low energy timer pulse counter watchdog timer protocol timer 32-bit bus peripheral reflex system serial interfaces i/o ports analog i/f lowest power mode with peripheral operational: usart low energy uart tm i 2 c external interrupts general purpose i/o pin reset pin wakeup adc idac analog comparator radio transceiver demod agc ifadc crc bufc rfsense mod frc rac em3stop em2deep sleep em1sleep em4hibernate em4shutoff em0active pa i q rf frontend lna frequency synthesizer pga balun core / memory arm cortex tm m4 processor with dsp extensions and fpu energy management brown-out detector dc-dc converter voltage regulator voltage monitor power-on reset other crypto crc clock management high frequency crystal oscillator low frequency crystal oscillator low frequency rc oscillator high frequency rc oscillator ultra low frequency rc oscillator auxiliary high frequency rc oscillator serial flash memory ram memory debug interface dma controller memory protection unit flash program memory silabs.com | smart. connected. energy-friendly. rev. 1.0
1. feature list the efr32mg1 highlighted features are listed below. ? low power wireless system-on-chip . ? high performance 32-bit 40 mhz arm cortex ? -m4 with dsp instruction and floating-point unit for efficient signal processing ? 256 kb flash program memory ? 512 kb integrated serial flash memory ? 32 kb ram data memory ? 2.4 ghz radio operation ? tx power up to 19.5 dbm ? low energy consumption ? 8.7 ma rx current at 2.4 ghz (1 mbps gfsk) ? 9.8 ma rx current at 2.4 ghz (250 kbps o-qpsk dsss) ? 8.2 ma tx current @ 0 dbm output power at 2.4 ghz ? 63 a/mhz in active mode (em0) ? 5.5 a em2 deepsleep current (full ram retention and rtcc running from lfxo) ? 5.1 a em3 stop current (state/ram retention) ? wake on radio with signal strength detection, preamble pattern detection, frame detection and timeout ? high receiver performance ? -92.5 dbm sensitivity @ 1 mbit/s gfsk ? -99 dbm sensitivity @ 250 kbps o-qpsk dsss ? supported modulation format ? 2-fsk / 4-fsk with fully configurable shaping ? shaped oqpsk / (g)msk ? supported protocols: ? bluetooth smart ? zigbee ? ? thread ? 2.4 ghz proprietary protocols ? support for internet security ? general purpose crc ? random number generation ? hardware cryptographic acceleration for aes 128/256, sha-1, sha-2 (sha-224 and sha-256) and ecc ? wide selection of mcu peripherals ? 12-bit 1 msps sar analog to digital converter (adc) ? 2 analog comparator (acmp) ? digital to analog current converter (idac) ? up to 16 pins connected to analog channels (aport) shared between analog comparators, adc, and idac ? up to 16 general purpose i/o pins with output state reten- tion and asynchronous interrupts ? 8 channel dma controller ? 12 channel peripheral reflex system (prs) ? 216-bit timer/counter ? 3 + 4 compare/capture/pwm channels ? 32-bit real time counter and calendar ? 16-bit low energy timer for waveform generation ? 32-bit ultra low energy timer/counter for periodic wake-up from any energy mode ? 16-bit pulse counter with asynchronous operation ? watchdog timer with dedicated rc oscillator @ 50na ? universal synchronous/asynchronous receiver/transmitter (uart/spi/smartcard (iso 7816)/irda) ? low energy uart (leuart ? ) ? i 2 c interface with smbus support and address recognition in em3 stop ? wide operating range ? 2.3 v to 3.6 v single power supply ? integrated dc-dc, down to 1.8 v output with up to 200 ma load current for system ? standard (-40 c to 85 c) and extended (-40 c to 125 c) temperature grades available ? qfn32 5x5 mm package efr32mg1 mighty gecko soc with integrated serial flash data sheet feature list silabs.com | smart. connected. energy-friendly. rev. 1.0 | 1
2. ordering information ordering code protocol stack frequency band @ max tx power flash (kb) serial flash (kb) ram (kb) temp range efr32mg1p732f256gm32-c0 ? bluetooth smart ? zigbee ? thread ? zigbee rc ? proprietary 2.4 ghz @ 19.5 dbm 256 512 32 -40 to +85 efr32mg1p732f256im32-c0 ? bluetooth smart ? zigbee ? thread ? zigbee rc ? proprietary 2.4 ghz @ 19.5 dbm 256 512 32 -40 to +125 efr32mg1p632f256gm32-c0 ? bluetooth smart ? zigbee ? thread ? zigbee rc ? proprietary 2.4 ghz @ 16.5 dbm 256 512 32 -40 to +85 EFR32MG1P632F256IM32-C0 ? bluetooth smart ? zigbee ? thread ? zigbee rc ? proprietary 2.4 ghz @ 16.5 dbm 256 512 32 -40 to +125 efr32mg1b732f256gm32-c0 ? zigbee ? thread ? zigbee rc 2.4 ghz @ 19.5 dbm 256 512 32 -40 to +85 efr32mg1b732f256im32-c0 ? zigbee ? thread ? zigbee rc 2.4 ghz @ 19.5 dbm 256 512 32 -40 to +125 efr32mg1b632f256gm32-c0 ? zigbee ? thread ? zigbee rc 2.4 ghz @ 16.5 dbm 256 512 32 -40 to +85 efr32mg1b632f256im32-c0 ? zigbee ? thread ? zigbee rc 2.4 ghz @ 16.5 dbm 256 512 32 -40 to +125 efr32mg1 mighty gecko soc with integrated serial flash data sheet ordering information silabs.com | smart. connected. energy-friendly. rev. 1.0 | 2
efr32 C 1 p f g c0 r tape and reel (optional) revision pin count package C m (qfn), j (csp) flash memory size in kb memory type (flash) feature set code C r2r1r0 r2: reserved r1: rf type C 3 (trx), 2 (rx), 1 (tx) r0: frequency band C 1 (sub-ghz), 2 (2.4 ghz), 3 (dual-band) g x 132 256 m 32 temperature grade C g (-40 to +85 c), -i (-40 to +125 c) performance grade C p (performance), b (basic), v (value) generation family C m (mighty), b (blue), f (flex) wireless gecko 32-bit gecko figure 2.1. opn decoder efr32mg1 mighty gecko soc with integrated serial flash data sheet ordering information silabs.com | smart. connected. energy-friendly. rev. 1.0 | 3
3. system overview 3.1 introduction the efr32 product family combines an energy-friendly mcu with a highly integrated radio transceiver. this section gives a short intro- duction to the full radio and mcu system. the detailed functional description can be found in the efr32 reference manual. a block diagram of the efr32mg1 family is shown in figure 3.1 detailed efr32mg1 block diagram on page 4 . the diagram shows a superset of features available on the family, which vary by opn. for more information about specific device features, consult ordering information . analog peripherals clock management lfxtal_p / n lfxo idac arm cortex-m4 core up to 256 kb isp flash program memory up to 32 kb ram a h b watchdog timer reset management unit brown out / power-on reset resetn digital peripherals input mux port mapper port i/o configuration i2c analog comparator 12-bit adc temp sensor vref vdd vdd internal reference timer cryotimer pcnt usart port a drivers port b drivers pan port c drivers pcn pbn port d drivers pdn letimer rtc / rtcc iovdd auxhfrco hfrco ulfrco hfxo port f drivers pfn memory protection unit lfrco leuart crypto crc dma controller + - aport floating point unit energy management dc-dc converter dvdd vregvdd vss vregsw bypass avdd pavdd rfvdd voltage regulator decouple iovdd voltage monitor vregvss rfvss pavss serial wire debug / programming radio transciever 2g4rf_iop 2g4rf_ion rf frontend pa i q lna balun rfsense frequency synthesizer demod agc ifadc crc bufc mod frc rac pga hfxtal_p hfxtal_n co-packaged resources 512 kb serial flash memory a p b figure 3.1. detailed efr32mg1 block diagram 3.2 radio the mighty gecko family features a highly configurable radio transceiver supporting a wide range of wireless protocols. 3.2.1 antenna interface the 2.4 ghz antenna interface consists of two pins (2g4rf_iop and 2g4rf_ion) that interface directly to the on-chip balun. the 2g4rf_ion pin should be grounded externally. the external components and power supply connections for the antenna interface typical applications are shown in the rf matching networks section. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 4
3.2.2 fractional-n frequency synthesizer the efr32mg1 contains a high performance, low phase noise, fully integrated fractional-n frequency synthesizer. the synthesizer is used in receive mode to generate the lo frequency used by the down-conversion mixer. it is also used in transmit mode to directly generate the modulated rf carrier. the fractional-n architecture provides excellent phase noise performance combined with frequency resolution better than 100 hz, with low energy consumption. the synthesizer has fast frequency settling which allows very short receiver and transmitter wake up times to optimize system energy consumption. 3.2.3 receiver architecture the efr32mg1 uses a low-if receiver architecture, consisting of a low-noise amplifier (lna) followed by an i/q down-conversion mixer, employing a crystal reference. the i/q signals are further filtered and amplified before being sampled by the if analog-to-digital converter (ifadc). the if frequency is configurable from 150 khz to 1371 khz. the if can further be configured for high-side or low-side injection, provid- ing flexibility with respect to known interferers at the image frequency. the automatic gain control (agc) module adjusts the receiver gain to optimize performance and avoid saturation for excellent selec- tivity and blocking performance. devices are production-calibrated to improve image rejection performance. demodulation is performed in the digital domain. the demodulator performs configurable decimation and channel filtering to allow re- ceive bandwidths ranging from 0.1 to 2530 khz. high carrier frequency and baud rate offsets are tolerated by active estimation and compensation. advanced features supporting high quality communication under adverse conditions include forward error correction by block and convolutional coding as well as direct sequence spread spectrum (dsss). a received signal strength indicator (rssi) is available for signal quality metrics, for level-based proximity detection, and for rf chan- nel access by collision avoidance (ca) or listen before talk (lbt) algorithms. an rssi capture value is associated with each received frame and the dynamic rssi measurement can be monitored throughout reception. the efr32mg1 features integrated support for antenna diversity to improve link budget, using complementary control outputs to an external switch. internal configurable hardware controls automatic switching between antennae during rf receive detection operations. 3.2.4 transmitter architecture the efr32mg1 uses a direct-conversion transmitter architecture. for constant envelope modulation formats, the modulator controls phase and frequency modulation in the frequency synthesizer. transmit symbols or chips are optionally shaped by a digital shaping filter. the shaping filter is fully configurable, including the bt product, and can be used to implement gaussian or raised cosine shap- ing. carrier sense multiple access - collision avoidance (csma-ca) or listen before talk (lbt) algorithms can be automatically timed by the efr32mg1 . these algorithms are typically defined by regulatory standards to improve inter-operability in a given bandwidth be- tween devices that otherwise lack synchronized rf channel access. 3.2.5 wake on radio the wake on radio feature allows flexible, autonomous rf sensing, qualification, and demodulation without required mcu activity, us- ing a subsystem of the efr32mg1 including the radio controller (rac), peripheral reflex system (prs), and low energy peripher- als. 3.2.6 rfsense the rfsense module generates a system wakeup interrupt upon detection of wideband rf energy at the antenna interface, providing true rf wakeup capabilities from low energy modes including em2, em3 and em4. rfsense triggers on a relatively strong rf signal and is available in the lowest energy modes, allowing exceptionally low energy con- sumption. rfsense does not demodulate or otherwise qualify the received signal, but software may respond to the wakeup event by enabling normal rf reception. various strategies for optimizing power consumption and system response time in presence of false alarms may be employed using available timer peripherals. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 5
3.2.7 flexible frame handling efr32mg1 has an extensive and flexible frame handling support for easy implementation of even complex communication protocols. the frame controller (frc) supports all low level and timing critical tasks together with the radio controller and modulator/ demodulator: ? highly adjustable preamble length ? up to 2 simultaneous synchronization words, each up to 32 bits and providing separate interrupts ? frame disassembly and address matching (filtering) to accept or reject frames ? automatic ack frame assembly and transmission ? fully flexible crc generation and verification: ? multiple crc values can be embedded in a single frame ? 8, 16, 24 or 32-bit crc value ? configurable crc bit and byte ordering ? selectable bit-ordering (least significant or most significant bit first) ? optional data whitening ? optional forward error correction (fec), including convolutional encoding / decoding and block encoding / decoding ? half rate convolutional encoder and decoder with constraint lengths from 2 to 7 and optional puncturing ? optional symbol interleaving, typically used in combination with fec ? symbol coding, such as manchester or dsss, or biphase space encoding using fec hardware ? uart encoding over air, with start and stop bit insertion / removal ? test mode support, such as modulated or unmodulated carrier output ? received frame timestamping 3.2.8 packet and state trace the efr32mg1 frame controller has a packet and state trace unit that provides valuable information during the development phase. it features: ? non-intrusive trace of transmit data, receive data and state information ? data observability on a single-pin uart data output, or on a two-pin spi data output ? configurable data output bitrate / baudrate ? multiplexed transmitted data, received data and state / meta information in a single serial data stream 3.2.9 data buffering the efr32mg1 features an advanced radio buffer controller (bufc) capable of handling up to 4 buffers of adjustable size from 64 bytes to 4096 bytes. each buffer can be used for rx, tx or both. the buffer data is located in ram, enabling zero-copy operations. 3.2.10 radio controller (rac) the radio controller controls the top level state of the radio subsystem in the efr32mg1. it performs the following tasks: ? precisely-timed control of enabling and disabling of the receiver and transmitter circuitry ? run-time calibration of receiver, transmitter and frequency synthesizer ? detailed frame transmission timing, including optional lbt or csma-ca 3.2.11 random number generator the frame controller (frc) implements a random number generator that uses entropy gathered from noise in the rf receive chain. the data is suitable for use in cryptographic applications. output from the random number generator can be used either directly or as a seed or entropy source for software-based random num- ber generator algorithms such as fortuna. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 6
3.3 power the efr32mg1 has an energy management unit (emu) and efficient integrated regulators to generate internal supply voltages. only a single external supply voltage is required, from which all internal voltages are created. an optional integrated dc-dc buck regulator can be utilized to further reduce the current consumption. the dc-dc regulator requires one external inductor and one external capacitor. running from a sufficiently high supply, the device can use the dc-dc to regulate voltage not only for itself, but also for other pcb components, supplying up to a total of 200 ma. 3.3.1 energy management unit (emu) the energy management unit manages transitions of energy modes in the device. each energy mode defines which peripherals and features are available and the amount of current the device consumes. the emu can also be used to turn off the power to unused ram blocks, and it contains control registers for the dc-dc regulator and the voltage monitor (vmon). the vmon is used to monitor multiple supply voltages. it has multiple channels which can be programmed individually by the user to determine if a sensed supply has fallen below a chosen threshold. 3.3.2 dc-dc converter the dc-dc buck converter covers a wide range of load currents and provides up to 90% efficiency in energy modes em0, em1, em2 and em3, and can supply up to 200 ma to the device and surrounding pcb components. patented rf noise mitigation allows operation of the dc-dc converter without degrading sensitivity of radio components. protection features include programmable current limiting, short-circuit protection, and dead-time protection. the dc-dc converter may also enter bypass mode when the input voltage is too low for efficient operation. in bypass mode, the dc-dc input supply is internally connected directly to its output through a low resistance switch. bypass mode also supports in-rush current limiting to prevent input supply voltage droops due to excessive output current tran- sients. 3.4 general purpose input/output (gpio) efr32mg1 has up to 16 general purpose input/output pins. each gpio pin can be individually configured as either an output or input. more advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual gpio pin. the gpio pins can be overridden by peripheral connections, like spi communication. each peripheral connection can be routed to sev- eral gpio pins on the device. the input value of a gpio pin can be routed through the peripheral reflex system to other peripherals. the gpio subsystem supports asynchronous external pin interrupts. 3.5 clocking 3.5.1 clock management unit (cmu) the clock management unit controls oscillators and clocks in the efr32mg1 . individual enabling and disabling of clocks to all periph- eral modules is performed by the cmu. the cmu also controls enabling and configuration of the oscillators. a high degree of flexibility allows software to optimize energy consumption in any specific application by minimizing power dissipation in unused peripherals and oscillators. 3.5.2 internal and external oscillators the efr32mg1 supports two crystal oscillators and fully integrates four rc oscillators, listed below. ? a high frequency crystal oscillator (hfxo) with integrated load capacitors, tunable in small steps, provides a precise timing refer- ence for the mcu. crystal frequencies in the range from 38 to 40 mhz are supported. an external clock source such as a tcxo can also be applied to the hfxo input for improved accuracy over temperature. ? a 32.768 khz crystal oscillator (lfxo) provides an accurate timing reference for low energy modes. ? an integrated high frequency rc oscillator (hfrco) is available for the mcu system, when crystal accuracy is not required. the hfrco employs fast startup at minimal energy consumption combined with a wide frequency range. ? an integrated auxilliary high frequency rc oscillator (auxhfrco) is available for timing the general-purpose adc and the serial wire debug port with a wide frequency range. ? an integrated low frequency 32.768 khz rc oscillator (lfrco) can be used as a timing reference in low energy modes, when crys- tal accuracy is not required. ? an integrated ultra-low frequency 1 khz rc oscillator (ulfrco) is available to provide a timing reference at the lowest energy con- sumption in low energy modes. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 7
3.6 counters/timers and pwm 3.6.1 timer/counter (timer) timer peripherals keep track of timing, count events, generate pwm outputs and trigger timed actions in other peripherals through the prs system. the core of each timer is a 16-bit counter with up to 4 compare/capture channels. each channel is configurable in one of three modes. in capture mode, the counter state is stored in a buffer at a selected input event. in compare mode, the channel output reflects the comparison of the counter to a programmed threshold value. in pwm mode, the timer supports generation of pulse-width modulation (pwm) outputs of arbitrary waveforms defined by the sequence of values written to the compare registers, with optional dead-time insertion available in timer unit timer_0 only. 3.6.2 real time counter and calendar (rtcc) the real time counter and calendar (rtcc) is a 32-bit counter providing timekeeping in all energy modes. the rtcc includes a binary coded decimal (bcd) calendar mode for easy time and date keeping. the rtcc can be clocked by any of the on-board oscilla- tors with the exception of the auxhfrco, and it is capable of providing system wake-up at user defined instances. when receiving frames, the rtcc value can be used for timestamping. the rtcc includes 128 bytes of general purpose data retention, allowing easy and convenient data storage in all energy modes. 3.6.3 low energy timer (letimer) the unique letimer is a 16-bit timer that is available in energy mode em2 deep sleep in addition to em1 sleep and em0 active. this allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. the letimer can be used to output a variety of wave- forms with minimal software intervention. the letimer is connected to the real time counter and calendar (rtcc), and can be con- figured to start counting on compare matches from the rtcc. 3.6.4 ultra low power wake-up timer (cryotimer) the cryotimer is a 32-bit counter that is capable of running in all energy modes. it can be clocked by either the 32.768 khz crystal oscillator (lfxo), the 32.768 khz rc oscillator (lfrco), or the 1 khz rc oscillator (ulfrco). it can provide periodic wakeup events and prs signals which can be used to wake up peripherals from any energy mode. the cryotimer provides a wide range of inter- rupt periods, facilitating flexible ultra-low energy operation. 3.6.5 pulse counter (pcnt) the pulse counter (pcnt) peripheral can be used for counting pulses on a single input or to decode quadrature encoded inputs. the clock for pcnt is selectable from either an external source on pin pctnn_s0in or from an internal timing reference, selectable from among any of the internal oscillators, except the auxhfrco. the module may operate in energy mode em0 active, em1 sleep, em2 deep sleep, and em3 stop. 3.6.6 watchdog timer (wdog) the watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the cpu clock. it has windowed monitoring capabilities, and can generate a reset or different interrupts depending on the failure mode of the system. the watchdog can also monitor autonomous systems driven by prs. 3.7 communications and other digital peripherals 3.7.1 universal synchronous/asynchronous receiver/transmitter (usart) the universal synchronous/asynchronous receiver/transmitter is a flexible serial i/o module. it supports full duplex asynchronous uart communication with hardware flow control as well as rs-485, spi, microwire and 3-wire. it can also interface with devices sup- porting: ? iso7816 smartcards ? irda 3.7.2 low energy universal asynchronous receiver/transmitter (leuart) the unique leuart tm provides two-way uart communication on a strict power budget. only a 32.768 khz clock is needed to allow uart communication up to 9600 baud. the leuart includes all necessary hardware to make asynchronous serial communication possible with a minimum of software intervention and energy consumption. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 8
3.7.3 inter-integrated circuit interface (i 2 c) the i 2 c module provides an interface between the mcu and a serial i 2 c bus. it is capable of acting as both a master and a slave and supports multi-master buses. standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10 kbit/s up to 1 mbit/s. slave arbitration and timeouts are also available, allowing implementation of an smbus-compliant system. the interface provided to software by the i 2 c module allows precise timing control of the transmission process and highly automated trans- fers. automatic recognition of slave addresses is provided in active and low energy modes. 3.7.4 peripheral reflex system (prs) the peripheral reflex system provides a communication network between different peripheral modules without software involvement. peripheral modules producing reflex signals are called producers. the prs routes reflex signals from producers to consumer periph- erals which in turn perform actions in response. edge triggers and other functionality can be applied by the prs. the prs allows pe- ripheral to act autonomously without waking the mcu core, saving power. 3.8 security features 3.8.1 gpcrc (general purpose cyclic redundancy check) the gpcrc module implements a cyclic redundancy check (crc) function. it supports both 32-bit and 16-bit polynomials. the sup- ported 32-bit polynomial is 0x04c11db7 (ieee 802.3), while the 16-bit polynomial can be programmed to any value, depending on the needs of the application. 3.8.2 crypto accelerator (crypto) the crypto accelerator is a fast and energy-efficient autonomous hardware encryption and decryption accelerator. efr32 devices sup- port various levels of hardware-accelerated encryption, depending on the part number. aes-only devices support aes encryption and decryption with 128- or 256-bit keys. full crypto support adds ecc over both gf(p) and gf(2 m ), sha-1 and sha-2 (sha-224 and sha-256). supported block cipher modes of operation for aes include: ecb, ctr, cbc, pcbc, cfb, ofb, gcm, cbc-mac, gmac and ccm. supported ecc nist recommended curves include p-192, p-224, p-256, k-163, k-233, b-163 and b-233. the crypto is tightly linked to the radio buffer controller (bufc) enabling fast and efficient autonomous cipher operations on data buffer content. it allows fast processing of gcm (aes), ecc and sha with little cpu intervention. crypto also provides trigger sig- nals for dma read and write operations. 3.9 analog 3.9.1 analog port (aport) the analog port (aport) is an analog interconnect matrix allowing access to analog modules adc, acmp, and idac on a flexible selection of pins. each aport bus consists of analog switches connected to a common wire. since many clients can operate differen- tially, buses are grouped by x/y pairs. 3.9.2 analog comparator (acmp) the analog comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is high- er. inputs are selected from among internal references and external pins. the tradeoff between response time and current consumption is configurable by software. two 6-bit reference dividers allow for a wide range of internally-programmable reference sources. the acmp can also be used to monitor the supply voltage. an interrupt can be generated when the supply falls below or rises above the programmable threshold. 3.9.3 analog to digital converter (adc) the adc is a successive approximation register (sar) architecture, with a resolution of up to 12 bits at up to 1 msamples/s. the output sample resolution is configurable and additional resolution is possible using integrated hardware for averaging over multiple samples. the adc includes integrated voltage references and an integrated temperature sensor. inputs are selectable from a wide range of sources, including pins configurable as either single-ended or differential. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 9
3.9.4 digital to analog current converter (idac) the digital to analog current converter can source or sink a configurable constant current. this current can be driven on an output pin or routed to the selected adc input pin for capacitive sensing. the current is programmable between 0.05 a and 64 a with several ranges with various step sizes. 3.10 reset management unit (rmu) the rmu is responsible for handling reset of the efr32mg1 . a wide range of reset sources are available, including several power supply monitors, pin reset, software controlled reset, core lockup reset and watchdog reset. 3.11 core and memory 3.11.1 processor core the arm cortex-m processor includes a 32-bit risc processor integrating the following features and tasks in the system: ? arm cortex-m4 risc processor achieving 1.25 dhrystone mips/mhz ? memory protection unit (mpu) supporting up to 8 memory segments ? up to 256 kb flash program memory ? up to 32 kb ram data memory ? configuration and event handling of all modules ? 2-pin serial-wire debug interface 3.11.2 serial flash 512 kb of high-speed, low-power serial flash is included in the system, accessible via a dedicated serial interface. the serial flash is internal to the package, requiring no additional area on the pcb. software libraries enable easy api-level access to this memory space. 3.11.3 memory system controller (msc) the memory system controller (msc) is the program memory unit of the microcontroller. the flash memory is readable and writable from both the cortex-m and dma. the flash memory is divided into two blocks; the main block and the information block. program code is normally written to the main block, whereas the information block is available for special user data and flash lock bits. there is also a read-only page in the information block containing system and device calibration data. read and write operations are supported in en- ergy modes em0 active and em1 sleep. 3.11.4 linked direct memory access controller (ldma) the linked direct memory access (ldma) controller features 8 channels capable of performing memory operations independently of software. this reduces both energy consumption and software workload. the ldma allows operations to be linked together and stag- ed, enabling sophisticated operations to be implemented. efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 10
3.12 memory map the efr32mg1 memory map is shown in the figures below. ram and flash sizes are for the largest memory configuration. figure 3.2. efr32mg1 memory map core peripherals and code space efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 11
figure 3.3. efr32mg1 memory map peripherals 3.13 configuration summary the features of the efr32mg1 are a subset of the feature set described in the device reference manual. the table below describes device specific implementation of the features. remaining modules support full configuration. table 3.1. configuration summary module configuration pin connections usart0 irda smartcard us0_tx, us0_rx, us0_clk, us0_cs timer0 with dti tim0_cc[2:0], tim0_cdti[2:0] timer1 tim1_cc[3:0] efr32mg1 mighty gecko soc with integrated serial flash data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 12
4. electrical specifications 4.1 electrical characteristics all electrical parameters in all tables are specified under the following conditions, unless stated otherwise: ? typical values are based on t amb =25 c and v dd = 3.3 v, by production test and/or technology characterization. ? radio performance numbers are measured in conducted mode, based on silicon laboratories reference designs using output pow- er-specific external rf impedance-matching networks for interfacing to a 50 ? antenna. ? minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature, unless stated otherwise. refer to table 4.2 general operating conditions on page 15 for more details about operational supply and temperature limits. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 13
4.1.1 absolute maximum ratings stresses above those listed below may cause permanent damage to the device. this is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. for more information on the available quality and relia- bility data, see the quality and reliability monitor report at http://www.silabs.com/support/quality/pages/default.aspx . table 4.1. absolute maximum ratings parameter symbol test condition min typ max unit storage temperature range t stg -50 150 c external main supply voltage v ddmax 0 3.6 v external main supply voltage ramp rate v ddrampmax 1 v / s voltage on any 5v tolerant gpio pin 1 v digpin -0.3 min of 5.25 and iovdd +2 v voltage on non-5v tolerant gpio pins -0.3 iovdd+0.3 v voltage on hfxo pins v hfxopin -0.3 1.4 v input rf level on pins 2g4rf_iop and 2g4rf_ion p rfmax2g4 10 dbm voltage differential between rf pins (2g4rf_iop - 2g4rf_ion) v maxdiff2g4 -50 50 mv absolute voltage on rf pins 2g4rf_iop and 2g4rf_ion v max2g4 -0.3 3.3 v total current into vdd power lines (source) i vddmax 200 ma total current into vss ground lines (sink) i vssmax 200 ma current per i/o pin (sink) i iomax 50 ma current per i/o pin (source) 50 ma current for all i/o pins (sink) i ioallmax 200 ma current for all i/o pins (source) 200 ma voltage difference between avdd and vregvdd v dd 0.3 v junction temperature for -g grade devices t j -40 105 c junction temperature for -i grade devices -40 125 c note: 1. when a gpio pin is routed to the analog module through the aport, the maximum voltage = iovdd. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 14
4.1.2 operating conditions when assigning supply sources, the following requirements must be observed: ? vregvdd must be the highest voltage in the system ? vregvdd = avdd ? dvdd avdd ? iovdd avdd ? rfvdd avdd ? pavdd avdd 4.1.2.1 general operating conditions table 4.2. general operating conditions parameter symbol test condition min typ max unit operating temperature range t op -g temperature grade, ambient temperature -40 25 85 c -i temperature grade, junction temperature -40 25 125 c avdd supply voltage 1 v avdd 2.3 3.3 3.6 v vregvdd operating supply voltage 1 2 v vregvdd dcdc in regulation 2.4 3.3 3.6 v dcdc in bypass 50ma load 2.3 3.3 3.6 v dcdc not in use. dvdd external- ly shorted to vregvdd 2.3 3.3 3.6 v vregvdd current i vregvdd dcdc in bypass, t amb 85 c 200 ma dcdc in bypass, t amb > 85 c 100 ma rfvdd operating supply voltage v rfvdd 1.62 v vregvdd v dvdd operating supply volt- age v dvdd 1.62 v vregvdd v pavdd operating supply voltage v pavdd 1.62 v vregvdd v iovdd operating supply voltage v iovdd 2.3 v vregvdd v difference between avdd and vregvdd, abs(avdd- vregvdd) dv dd 0.1 v hfclk frequency f core 0 wait-states (mode = ws0) 3 26 mhz 1 wait-states (mode = ws1) 3 38.4 40 mhz note: 1. vregvdd must be tied to avdd. both vregvdd and avdd minimum voltages must be satisfied for the part to operate. 2. the minimum voltage required in bypass mode is calculated using r byp from the dcdc specification table. requirements for other loads can be calculated as v dvdd_min +i load * r byp_max 3. in msc_readctrl register efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 15
4.1.3 thermal characteristics table 4.3. thermal characteristics parameter symbol test condition min typ max unit thermal resistance theta ja qfn32 package, 2-layer pcb, air velocity = 0 m/s 85.2 c/w qfn32 package, 2-layer pcb, air velocity = 1 m/s 67.1 c/w qfn32 package, 2-layer pcb, air velocity = 2 m/s 58.3 c/w qfn32 package, 4-layer pcb, air velocity = 0 m/s 36.9 c/w qfn32 package, 4-layer pcb, air velocity = 1 m/s 32.4 c/w qfn32 package, 4-layer pcb, air velocity = 2 m/s 31 c/w efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 16
4.1.4 dc-dc converter test conditions: l dcdc =4.7 h (murata lqh3npn4r7mm0l), c dcdc =1.0 f (murata grm188r71a105ka61d), v dcdc_i =3.3 v, v dcdc_o =1.8 v, i dcdc_load =50 ma, heavy drive configuration, f dcdc_ln =7 mhz, unless otherwise indicated. table 4.4. dc-dc converter parameter symbol test condition min typ max unit input voltage range v dcdc_i bypass mode, i dcdc_load = 50 ma 2.3 v vregvdd_ max v low noise (ln) mode, 1.8 v out- put, i dcdc_load = 100 ma, or low power (lp) mode, 1.8 v out- put, i dcdc_load = 10 ma 2.4 v vregvdd_ max v low noise (ln) mode, 1.8 v out- put, i dcdc_load = 200 ma 2.6 v vregvdd_ max v output voltage programma- ble range 1 v dcdc_o 1.8 v vregvdd v regulation dc accuracy acc dc low noise (ln) mode, 1.8 v target output 1.7 1.9 v regulation window 2 win reg low power (lp) mode, lpcmpbias 3 = 0, 1.8 v target output, i dcdc_load 75 a 1.63 2.2 v low power (lp) mode, lpcmpbias 3 = 3, 1.8 v target output, i dcdc_load 10 ma 1.63 2.1 v steady-state output ripple v r radio disabled. 3 mvpp output voltage under/over- shoot v ov ccm mode (lnforceccm 3 = 1), load changes between 0 ma and 100 ma 150 mv dcm mode (lnforceccm 3 = 0), load changes between 0 ma and 10 ma 150 mv overshoot during lp to ln ccm/dcm mode transitions com- pared to dc level in ln mode 200 mv undershoot during byp/lp to ln ccm (lnforceccm 3 = 1) mode transitions compared to dc level in ln mode 50 mv undershoot during byp/lp to ln dcm (lnforceccm 3 = 0) mode transitions compared to dc level in ln mode 125 mv dc line regulation v reg input changes between v vregvdd_max and 2.4 v 0.1 % dc load regulation i reg load changes between 0 ma and 100 ma in ccm mode 0.1 % efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 17
parameter symbol test condition min typ max unit max load current i load_max low noise (ln) mode, heavy drive 4 , t amb 85 c 200 ma low noise (ln) mode, heavy drive 4 , t amb > 85 c 100 ma low noise (ln) mode, medium drive 4 100 ma low noise (ln) mode, light drive 4 50 ma low power (lp) mode, lpcmpbias 3 = 0 75 a low power (lp) mode, lpcmpbias 3 = 3 10 ma dcdc nominal output ca- pacitor c dcdc 25% tolerance 1 1 1 f dcdc nominal output induc- tor l dcdc 20% tolerance 4.7 4.7 4.7 h resistance in bypass mode r byp 1.2 2.5 ? note: 1. due to internal dropout, the dc-dc output will never be able to reach its input voltage, v vregvdd 2. lp mode controller is a hysteretic controller that maintains the output voltage within the specified limits 3. in emu_dcdcmiscctrl register 4. drive levels are defined by configuration of the pfetcnt and nfetcnt registers. light drive: pfetcnt=nfetcnt=3; medi- um drive: pfetcnt=nfetcnt=7; heavy drive: pfetcnt=nfetcnt=15. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 18
4.1.5 current consumption 4.1.5.1 current consumption 3.3 v without dc-dc converter unless otherwise indicated, typical conditions are: vregvdd = avdd = dvdd = rfvdd = pavdd = 3.3 v. t op = 25 c. emu_pwrcfg_pwrcg=nodcdc. emu_dcdcctrl_dcdcmode=bypass. minimum and maximum values in this table repre- sent the worst conditions across supply voltage and process variation at t op = 25 c. see figure 5.1 efr32mg1 typical application circuit: direct supply configuration without dc-dc converter on page 64 . table 4.5. current consumption 3.3v without dc/dc parameter symbol test condition min typ max unit current consumption in em0 active mode with all periph- erals disabled i active 38.4 mhz crystal, cpu running while loop from flash 1 130 a/mhz 38 mhz hfrco, cpu running prime from flash 88 a/mhz 38 mhz hfrco, cpu running while loop from flash 100 105 a/mhz 38 mhz hfrco, cpu running coremark from flash 112 a/mhz 26 mhz hfrco, cpu running while loop from flash 102 106 a/mhz 1 mhz hfrco, cpu running while loop from flash 222 350 a/mhz current consumption in em1 sleep mode with all peripher- als disabled i em1 38.4 mhz crystal 1 65 a/mhz 38 mhz hfrco 35 38 a/mhz 26 mhz hfrco 37 41 a/mhz 1 mhz hfrco 157 275 a/mhz current consumption in em2 deep sleep mode. i em2 full ram retention and rtcc running from lfxo, serial flash in deep power down 6.3 a 4 kb ram retention and rtcc running from lfrco, serial flash in deep power down 6 9.2 a current consumption in em3 stop mode i em3 full ram retention and cryo- timer running from ulfrco, serial flash in deep power down 5.8 9.2 a current consumption in em4h hibernate mode i em4 128 byte ram retention, rtcc running from lfxo 4.1 a 128 byte ram retention, cryo- timer running from ulfrco 3.65 a 128 byte ram retention, no rtcc 3.65 4.7 a current consumption in em4s shutoff mode i em4s no ram retention, no rtcc 3.04 3.6 a note: 1. cmu_hfxoctrl_lowpower=0 efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 19
4.1.5.2 current consumption 3.3 v using dc-dc converter unless otherwise indicated, typical conditions are: vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd = 1.8 v dc-dc output. t op = 25 c. minimum and maximum values in this table represent the worst conditions across supply voltage and process variation at t op = 25 c. see figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 . table 4.6. current consumption 3.3v with dc-dc parameter symbol test condition min typ max unit current consumption in em0 active mode with all periph- erals disabled, dcdc in low noise dcm mode 1 . i active 38.4 mhz crystal, cpu running while loop from flash 2 88 a/mhz 38 mhz hfrco, cpu running prime from flash 63 a/mhz 38 mhz hfrco, cpu running while loop from flash 71 a/mhz 38 mhz hfrco, cpu running coremark from flash 78 a/mhz 26 mhz hfrco, cpu running while loop from flash 76 a/mhz current consumption in em0 active mode with all periph- erals disabled, dcdc in low noise ccm mode 3 . 38.4 mhz crystal, cpu running while loop from flash 2 98 a/mhz 38 mhz hfrco, cpu running prime from flash 75 a/mhz 38 mhz hfrco, cpu running while loop from flash 81 a/mhz 38 mhz hfrco, cpu running coremark from flash 88 a/mhz 26 mhz hfrco, cpu running while loop from flash 94 a/mhz current consumption in em1 sleep mode with all peripher- als disabled, dcdc in low noise dcm mode 1 . i em1 38.4 mhz crystal 2 49 a/mhz 38 mhz hfrco 32 a/mhz 26 mhz hfrco 38 a/mhz current consumption in em1 sleep mode with all peripher- als disabled, dcdc in low noise ccm mode 3 . 38.4 mhz crystal 2 61 a/mhz 38 mhz hfrco 45 a/mhz 26 mhz hfrco 58 a/mhz current consumption in em2 deep sleep mode. dcdc in low power mode 4 . i em2 full ram retention and rtcc running from lfxo, serial flash in deep power down 5.5 a 4 kb ram retention and rtcc running from lfrco, serial flash in deep power down 5.2 a current consumption in em3 stop mode i em3 full ram retention and cryo- timer running from ulfrco, serial flash in deep power down 5.1 a efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 20
parameter symbol test condition min typ max unit current consumption in em4h hibernate mode i em4 128 byte ram retention, rtcc running from lfxo 3.86 a 128 byte ram retention, cryo- timer running from ulfrco 3.58 a 128 byte ram retention, no rtcc 3.58 a current consumption in em4s shutoff mode i em4s no ram retention, no rtcc 3.04 a note: 1. dcdc low noise dcm mode = light drive (pfetcnt=nfetcnt=3), f=3.0 mhz (rcoband=0), anasw=dvdd 2. cmu_hfxoctrl_lowpower=0 3. dcdc low noise ccm mode = light drive (pfetcnt=nfetcnt=3), f=6.4 mhz (rcoband=4), anasw=dvdd 4. dcdc low power mode = medium drive (pfetcnt=nfetcnt=7), lposcdiv=1, lpbias=3, lpcilimsel=1, anasw=dvdd 4.1.5.3 current consumption using radio unless otherwise indicated, typical conditions are: vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. t op = 25 c. minimum and maximum values in this table represent the worst conditions across supply voltage and process variation at t op = 25 c. see figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 or figure 5.1 efr32mg1 typical application circuit: direct supply configuration without dc-dc converter on page 64 . table 4.7. current consumption using radio 3.3 v with dc-dc parameter symbol test condition min typ max unit current consumption in re- ceive mode, active packet reception (mcu in em1 @ 38.4 mhz, peripheral clocks disabled) i rx 1 mbit/s, 2gfsk, f = 2.4 ghz, radio clock prescaled by 4 8.7 ma 802.15.4 receiving frame, f = 2.4 ghz, radio clock prescaled by 3 9.8 ma current consumption in transmit mode (mcu in em1 @ 38.4 mhz, peripheral clocks disabled) i tx f = 2.4 ghz, cw, 0 dbm output power, radio clock prescaled by 3 8.2 ma f = 2.4 ghz, cw, 3 dbm output power 16.5 ma f = 2.4 ghz, cw, 8 dbm output power 23.3 ma f = 2.4 ghz, cw, 10.5 dbm out- put power 32.7 ma f = 2.4 ghz, cw, 16.5 dbm out- put power, pavdd connected di- rectly to external 3.3v supply 83.9 ma f = 2.4 ghz, cw, 19.5 dbm out- put power, pavdd connected di- rectly to external 3.3v supply 126.7 ma rfsense current consump- tion i rfsense 51 na efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 21
4.1.6 wake up times table 4.8. wake up times parameter symbol test condition min typ max unit wake up from em2 deep sleep t em2_wu code execution from flash 10.7 s code execution from ram 3 s wakeup time from em1 sleep t em1_wu executing from flash 3 ahb clocks executing from ram 3 ahb clocks wake up from em3 stop t em3_wu executing from flash 10.7 s executing from ram 3 s wake up from em4h hiber- nate 1 t em4h_wu executing from flash 60 s wake up from em4s shut- off 1 t em4s_wu 290 s note: 1. time from wakeup request until first instruction is executed. wakeup results in device reset. 4.1.7 brown out detector table 4.9. brown out detector parameter symbol test condition min typ max unit dvddbod threshold v dvddbod dvdd rising 1.62 v dvdd falling 1.35 v dvdd bod hysteresis v dvddbod_hyst 24 mv dvdd response time t dvddbod_delay supply drops at 0.1v/s rate 2.4 s avdd bod threshold v avddbod avdd rising 1.85 v avdd falling 1.62 v avdd bod hysteresis v avddbod_hyst 21 mv avdd response time t avddbod_delay supply drops at 0.1v/s rate 2.4 s em4 bod threshold v em4dbod avdd rising 1.7 v avdd falling 1.45 v em4 bod hysteresis v em4bod_hyst 46 mv em4 response time t em4bod_delay supply drops at 0.1v/s rate 300 s efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 22
4.1.8 frequency synthesizer characteristics table 4.10. frequency synthesizer characteristics parameter symbol test condition min typ max unit rf synthesizer frequency range f range_2400 2.4 ghz frequency range 2400 2483.5 mhz lo tuning frequency resolu- tion with 38.4 mhz crystal f res_2400 2400 - 2483.5 mhz 73 hz maximum frequency devia- tion with 38.4 mhz crystal f max_2400 1677 khz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 23
4.1.9 2.4 ghz rf transceiver characteristics 4.1.9.1 rf transmitter general characteristics for the 2.4 ghz band unless otherwise indicated, typical conditions are: t op = 25 c,vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. rfvdd and pavdd path is filtered using ferrites. crystal frequency=38.4mhz. rf center frequency 2.45 ghz. test circuit according to figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 and fig- ure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 . table 4.11. rf transmitter general characteristics for 2.4 ghz band parameter symbol test condition min typ max unit maximum tx power 1 pout max 19.5 dbm-rated part numbers. pavdd connected directly to ex- ternal 3.3v supply 2 19.5 dbm 16.5 dbm-rated part numbers. pavdd connected directly to ex- ternal 3.3v supply 16.5 dbm minimum active tx power pout min cw -30 dbm output power step size pout step -5 dbm< output power < 0 dbm 1 db 0 dbm < output power < pout max 0.5 db output power variation vs supply at pout max pout var_v 1.85 v < v vregvdd < 3.3 v, pavdd connected directly to ex- ternal supply, for output power > 10.5 dbm. 4.5 db 1.85 v < v vregvdd < 3.3 v using dc-dc converter 2.2 db output power variation vs temperature at pout max pout var_t from -40 to +85 c, pavdd con- nected to dc-dc output 1.5 db from -40 to +125 c, pavdd connected to dc-dc output 2.2 db from -40 to +85 c, pavdd con- nected to external supply 1.5 db from -40 to +125 c, pavdd connected to external supply 3.4 db output power variation vs rf frequency at pout max pout var_f over rf tuning frequency range 0.4 db rf tuning frequency range f range 2400 2483.5 mhz note: 1. supported transmit power levels are determined by the ordering part number (opn). transmit power ratings for all devices cov- ered in this datasheet can be found in the max tx power column of 2. ordering information 2. for bluetooth, the maximum tx power on channel 2456 is limited to +15 dbm to comply with in-band spurious emissions. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 24
4.1.9.2 rf receiver general characteristics for the 2.4 ghz band unless otherwise indicated, typical conditions are: t op = 25 c,vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. rfvdd and pavdd path is filtered using ferrites. crystal frequency=38.4mhz. rf center frequency 2.440 ghz. test circuit according to figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 and figure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 . table 4.12. rf receiver general characteristics for 2.4 ghz band parameter symbol test condition min typ max unit rf tuning frequency range f range 2400 2483.5 mhz receive mode maximum spurious emission spur rx 30 mhz to 1 ghz -57 dbm 1 ghz to 12 ghz -47 dbm max spurious emissions dur- ing active receive mode, per fcc part 15.109(a) spur rx_fcc 216 mhz to 960 mhz, conducted measurement -55.2 dbm above 960 mhz, conducted measurement -47.2 dbm level above which rfsense will trigger 1 rfsense trig cw at 2.45 ghz -24 dbm level below which rfsense will not trigger 1 rfsense thres -50 dbm 1% per sensitivity sens 2gfsk 2 mbps 2gfsk signal 2 -89.2 dbm 0.1% ber sensitivity 250 kbps 2gfsk signal -99.1 dbm note: 1. rfsense performance is only valid from 0 to 85 c. rfsense should be disabled outside this temperature range. 2. channel at 2420 mhz will have degraded sensitivity. sensitivity could be as high as -83dbm on this channel. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 25
4.1.9.3 rf transmitter characteristics for bluetooth smart in the 2.4 ghz band unless otherwise indicated, typical conditions are: t op = 25 c,vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. rfvdd and pavdd path is filtered using ferrites. crystal frequency=38.4mhz. rf center frequency 2.44 ghz. test circuit according to figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 and fig- ure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 . table 4.13. rf transmitter characteristics for bluetooth smart in the 2.4ghz band parameter symbol test condition min typ max unit transmit 6db bandwidth txbw 740 khz power spectral density limit psd limit per fcc part 15.247 at 10 dbm -6.5 dbm/ 3khz per fcc part 15.247 at 20 dbm -2.6 dbm/ 3khz per etsi 300.328 at 10 dbm/1 mhz 10 dbm occupied channel bandwidth per etsi en300.328 ocp etsi328 99% bw at highest and lowest channels in band 1.1 mhz in-band spurious emissions at 10 dbm, with allowed ex- ceptions 1 spur inb at 2 mhz -39.8 dbm at 3 mhz -42.1 dbm in-band spurious emissions at 20 dbm, with allowed ex- ceptions 1 2 at 2 mhz -20 dbm at 3 mhz -30 dbm emissions of harmonics out- of-band, per fcc part 15.247 spur hrm_fcc 2nd,3rd, 5, 6, 8, 9,10 harmonics; continuous transmission of modu- lated carrier -47 dbm spurious emissions out-of- band, per fcc part 15.247, excluding harmonics cap- tured in spur harm,fcc . re- stricted bands spur oob_fcc above 2.483 ghz or below 2.4 ghz; continuous transmission of modulated carrier 3 -47 dbm spurious emissions out-of- band, per fcc part 15.247, excluding harmonics cap- tured in spur harm,fcc . non restricted bands above 2.483 ghz or below 2.4 ghz; continuous transmission of modulated carrier -26 dbc spurious emissions out-of- band; per etsi 300.328 spur etsi328 [2400-bw to 2400] mhz, [2483.5 to 2483.5+bw] mhz -16 dbm [2400-2bw to 2400-bw] mhz, [2483.5+bw to 2483.5+2bw] mhz per etsi 300.328 -26 dbm spurious emissions per etsi en300.440 spur etsi440 47-74 mhz,87.5-108 mhz, 174-230 mhz, 470-862 mhz -60 dbm 25-1000 mhz -42 dbm 1-12 ghz -36 dbm efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 26
parameter symbol test condition min typ max unit note: 1. per bluetooth core_4.2, section 3.2.2, exceptions are allowed in up to three bands of 1 mhz width, centered on a frequency which is an integer multiple of 1 mhz. these exceptions shall have an absolute value of -20 dbm or less. 2. for 2456 mhz, a maximum output power of 15 dbm is used to achieve this value. 3. for 2480 mhz, a maximum duty cycle of 20% is used to achieve this value. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 27
4.1.9.4 rf receiver characteristics for bluetooth smart in the 2.4 ghz band unless otherwise indicated, typical conditions are: t op = 25 c,vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. rfvdd and pavdd path is filtered using ferrites. crystal frequency=38.4mhz. rf center frequency 2.440 ghz. test circuit according to figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 and figure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 . table 4.14. rf receiver characteristics for bluetooth smart in the 2.4ghz band parameter symbol test condition min typ max unit max usable receiver input level, 0.1% ber sat signal is reference signal 1 . packet length is 20 bytes. 10 dbm sensitivity, 0.1% ber 2 sens signal is reference signal 1 . using dc-dc converter -92.5 dbm with non-ideal signals as speci- fied in rf-phy.ts.4.2.2, section 4.6.1 -92 dbm signal to co-channel interfer- er, 0.1% ber c/i cc desired signal 3 db above refer- ence sensitivity 8.3 db n+1 adjacent channel (1 mhz) selectivity, 0.1% ber, with allowable exceptions. desired is reference signal at -67 dbm c/i 1+ interferer is reference signal at +1 mhz offset. desired frequency 2402 mhz fc 2480 mhz -3 db n-1 adjacent channel (1 mhz) selectivity, 0.1% ber, with allowable exceptions. desired is reference signal at -67 dbm c/i 1- interferer is reference signal at -1 mhz offset. desired frequency 2402 mhz fc 2480 mhz -0.5 db alternate (2 mhz) selectivity, 0.1% ber, with allowable exceptions. desired is refer- ence signal at -67 dbm c/i 2 interferer is reference signal at 2 mhz offset. desired frequency 2402 mhz fc 2480 mhz -43 db alternate (3 mhz) selectivity, 0.1% ber, with allowable exceptions. desired is refer- ence signal at -67 dbm c/i 3 interferer is reference signal at 3 mhz offset. desired frequency 2404 mhz fc 2480 mhz -46.7 db selectivity to image frequen- cy, 0.1% ber. desired is ref- erence signal at -67 dbm c/i im interferer is reference signal at im- age frequency with 1 mhz preci- sion -38.7 db selectivity to image frequen- cy +1 mhz, 0.1% ber. de- sired is reference signal at -67 dbm c/i im+1 interferer is reference signal at im- age frequency +1 mhz with 1 mhz precision -48.2 db blocking, 0.1% ber, desired is reference signal at -67 dbm. interferer is cw in oob range. block oob interferer frequency 30 mhz f 2000 mhz -27 dbm interferer frequency 2003 mhz f 2399 mhz -32 dbm interferer frequency 2484 mhz f 2997 mhz -32 dbm interferer frequency 3 ghz f 12.75 ghz -27 dbm efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 28
parameter symbol test condition min typ max unit intermodulation performance im per core_4.1, vol 6, part a, sec- tion 4.4 with n = 3 -25.8 dbm upper limit of input power range over which rssi reso- lution is maintained rssi max 4 dbm lower limit of input power range over which rssi reso- lution is maintained rssi min -101 dbm rssi resolution rssi res over rssi min to rssi max 0.5 db note: 1. reference signal is defined 2gfsk at -67 dbm, modulation index = 0.5, bt = 0.5, bit rate = 1 mbps, desired data = prbs9; interferer data = prbs15; frequency accuracy better than 1 ppm 2. receive sensitivity on bluetooth smart channel 26 is -86 dbm efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 29
4.1.9.5 rf transmitter characteristics for 802.15.4 o-qpsk dsss in the 2.4 ghz band unless otherwise indicated, typical conditions are: t=25 c,vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. rfvdd and pavdd path is filtered using ferrites. crystal frequency=38.4 mhz. rf center frequency 2.45 ghz. test circuit according to figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 and figure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 . table 4.15. rf transmitter characteristics for 802.15.4 dsss-oqpsk in the 2.4ghz band parameter symbol test condition min typ max unit error vector magnitude (off- set evm), per 802.15.4-2011, not including 2415 mhz channel 1 evm average across frequency. signal is dsss-oqpsk reference pack- et 2 5.5 % rms power spectral density limit psd limit relative, at carrier 3.5 mhz -26 dbc absolute, at carrier 3.5 mhz 3 -36 dbm per fcc part 15.247 -4.2 dbm/ 3khz output power level which meets 10dbm/mhz etsi 300.328 speci- fication 12 dbm occupied channel bandwidth per etsi en300.328 ocp etsi328 99% bw at highest and lowest channels in band 2.25 mhz spurious emissions of har- monics in restricted bands per fcc part 15.205/15.209, emissions taken at pout_max power level of 19.5 dbm, pavdd connec- ted to external 3.3 v supply, test frequency is 2450 mhz spur hrm_fcc_ r continuous transmission of modu- lated carrier -45.8 dbm spurious emissions of har- monics in harmonics in non- restricted bands per fcc part 15.247/15.35, emis- sions taken at pout_max power level of 19.5 dbm, pavdd connected to exter- nal 3.3 v supply, test fre- quency is 2450 mhz spur hrm_fcc_ nrr -26 dbc efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 30
parameter symbol test condition min typ max unit spurious emissions out-of- band in restricted bands (30-88 mhz), per fcc part 15.205/15.209, emissions taken at pout_max power level of 19.5 dbm, pavdd connected to external 3.3 v supply, test frequency = 2450 mhz spur oob_fcc_ r above 2.483 ghz or below 2.4 ghz; continuous transmission of modulated carrier 4 -52 dbm spurious emissions out-of- band in restricted bands (88-216 mhz), per fcc part 15.205/15.209, emissions taken at pout_max power level of 19.5 dbm, pavdd connected to external 3.3 v supply, test frequency = 2450 mhz -62 dbm spurious emissions out-of- band in restricted bands (216-960 mhz), per fcc part 15.205/15.209, emis- sions taken at pout_max power level of 19.5 dbm, pavdd connected to exter- nal 3.3 v supply, test fre- quency = 2450 mhz -57 dbm spurious emissions out-of- band in restricted bands (>960 mhz), per fcc part 15.205/15.209, emissions taken at pout_max power level of 19.5 dbm, pavdd connected to external 3.3 v supply, test frequency = 2450 mhz -48 dbm spurious emissions out-of- band in non-restricted bands per fcc part 15.247, emis- sions taken at pout_max power level of 19.5 dbm, pavdd connected to exter- nal 3.3 v supply, test fre- quency = 2450 mhz spur oob_fcc_ nr above 2.483 ghz or below 2.4 ghz; continuous transmission of modulated carrier -26 dbc spurious emissions out-of- band; per etsi 300.328 5 spur etsi328 [2400-bw to 2400], [2483.5 to 2483.5+bw]; -16 dbm [2400-2bw to 2400-bw], [2483.5+bw to 2483.5+2bw]; per etsi 300.328 -26 dbm spurious emissions per etsi en300.440 5 spur etsi440 47-74 mhz,87.5-108 mhz, 174-230 mhz, 470-862 mhz -60 dbm 25-1000 mhz, excluding above frequencies -42 dbm 1g-14g -36 dbm efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 31
parameter symbol test condition min typ max unit note: 1. typical evm for the 2415 mhz channel is 7.9% 2. reference packet is defined as 20 octet psdu, modulated according to 802.15.4-2011 dsss-oqpsk in the 2.4ghz band, with pseudo-random packet data content 3. for 2415 mhz, a maximum duty cycle of 50% is used to achieve this value. 4. for 2480 mhz, a maximum duty cycle of 20% is used to achieve this value. 5. specified at maximum power output level of 10 dbm efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 32
4.1.9.6 rf receiver characteristics for 802.15.4 o-qpsk dsss in the 2.4 ghz band unless otherwise indicated, typical conditions are: t=25 c,vregvdd = avdd = iovdd = 3.3 v, dvdd = rfvdd = pavdd. rfvdd and pavdd path is filtered using ferrites. crystal frequency=38.4 mhz. rf center frequency 2.445 ghz. test circuit according to figure 5.2 efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) on page 64 and figure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 . table 4.16. rf receiver characteristics for 802.15.4 dsss-oqpsk in the 2.4 ghz band parameter symbol test condition min typ max unit max usable receiver input level, 1% per sat signal is reference signal 1 . packet length is 20 octets. 10 dbm sensitivity, 1% per 2 sens signal is reference signal. packet length is 20 octets. using dc-dc converter. -99 dbm signal is reference signal. packet length is 20 octets. without dc- dc converter. -99 dbm co-channel interferer rejec- tion, 1% per ccr desired signal 10 db above sensi- tivity limit -2.6 db high-side adjacent channel rejection, 1% per. desired is reference signal at 3db above reference sensitivity level 3 acr +1 interferer is reference signal at +1 channel-spacing. 33.75 db interferer is filtered reference sig- nal 4 at +1 channel-spacing. 52.2 db interferer is cw at +1 channel- spacing. 5 58.6 db low-side adjacent channel rejection, 1% per. desired is reference signal at 3db above reference sensitivity level 3 acr -1 interferer is reference signal at -1 channel-spacing. 35 db interferer is filtered reference sig- nal 4 at -1 channel-spacing. 54.7 db interferer is cw at -1 channel- spacing. 60.1 db alternate channel rejection, 1% per. desired is refer- ence signal at 3db above reference sensitivity level 3 acr 2 interferer is reference signal at 2 channel-spacing 45.9 db interferer is filtered reference sig- nal 4 at 2 channel-spacing 56.8 db interferer is cw at 2 channel- spacing 65.5 db image rejection , 1% per, desired is reference signal at 3db above reference sensi- tivity level 3 ir interferer is cw in image band 5 49.3 db blocking rejection of all other channels. 1% per, desired is reference signal at 3db above reference sensitivity level 3 . interferer is reference signal. block interferer frequency < desired fre- quency - 3 channel-spacing 57.2 db interferer frequency > desired fre- quency + 3 channel-spacing 57.9 db blocking rejection of 802.11g signal centered at +12mhz or -13mhz block 80211g desired is reference signal at 6db above reference sensitivity level 3 51.6 db efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 33
parameter symbol test condition min typ max unit upper limit of input power range over which rssi reso- lution is maintained rssi max 5 dbm lower limit of input power range over which rssi reso- lution is maintained rssi min -98 dbm rssi resolution rssi res over rssi min to rssi max 0.25 db rssi accuracy in the linear region as defined by 802.15.4-2003 rssi lin 1 db note: 1. reference signal is defined as o-qpsk dsss per 802.15.4, frequency range = 2400-2483.5 mhz, symbol rate = 62.5 ksym- bols/s 2. receive sensitivity on 802.15.4 channel 14 is -98 dbm 3. reference sensitivity level is -85 dbm 4. filter is characterized as a symmetric bandpass centered on the adjacent channel having a 3db bandwidth of 4.6 mhz and stop- band rejection better than 26 db beyond 3.15 mhz from the adjacent carrier. 5. due to low-if frequency, there is some overlap of adjacent channel and image channel bands. adjacent channel cw blocker tests place the interferer center frequency at the desired frequency 5 mhz on the channel raster, whereas the image rejection test places the cw interferer near the image frequency of the desired signal carrier, regardless of the channel raster. 4.1.10 modem features table 4.17. modem features parameter symbol test condition min typ max unit receive bandwidth rx bandwidth configurable range with 38.4 mhz crystal 0.1 2530 khz if frequency if freq configurable range with 38.4 mhz crystal. selected steps available. 150 1371 khz dsss symbol length dsss range configurable in steps of 1 chip 2 32 chips dsss bits per symbol dsss bitpersym configurable 1 4 bits/ symbol efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 34
4.1.11 oscillators 4.1.11.1 lfxo table 4.18. lfxo parameter symbol test condition min typ max unit crystal frequency f lfxo 32.768 khz supported crystal equivalent series resistance (esr) esr lfxo 70 k? supported range of crystal load capacitance 1 c lfxo_cl 6 18 pf on-chip tuning cap range 2 c lfxo_t on each of lfxtal_n and lfxtal_p pins 8 40 pf on-chip tuning cap step size ss lfxo 0.25 pf current consumption after startup 3 i lfxo esr = 70 k?, c l = 7 pf, gain 4 = 3, agc 4 = 1 273 na start- up time t lfxo esr=70 k?, c l =7 pf, gain 4 =2 308 ms note: 1. total load capacitance as seen by the crystal 2. the effective load capacitance seen by the crystal will be c lfxo_t /2. this is because each xtal pin has a tuning cap and the two caps will be seen in series by the crystal. 3. block is supplied by avdd if anasw = 0, or dvdd if anasw=1 in emu_pwrctrl register 4. in cmu_lfxoctrl register efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 35
4.1.11.2 hfxo table 4.19. hfxo parameter symbol test condition min typ max unit crystal frequency f hfxo 38 38.4 40 mhz supported crystal equivalent series resistance (esr) esr hfxo crystal frequency 38.4 mhz 60 ? supported range of crystal load capacitance 1 c hfxo_cl 6 12 pf on-chip tuning cap range 2 c hfxo_t on each of hfxtal_n and hfxtal_p pins 9 20 25 pf on-chip tuning capacitance step ss hfxo 0.04 pf startup time t hfxo 38.4 mhz, esr = 50 ?, c l = 10 pf 300 s frequency tolerance for the crystal ft hfxo 38.4 mhz, esr = 50 ?, cl = 10 pf -40 40 ppm note: 1. total load capacitance as seen by the crystal 2. the effective load capacitance seen by the crystal will be c hfxo_t /2. this is because each xtal pin has a tuning cap and the two caps will be seen in series by the crystal. 4.1.11.3 lfrco table 4.20. lfrco parameter symbol test condition min typ max unit oscillation frequency f lfrco envref = 1 in cmu_lfrcoctrl, t amb 85 c 30.474 32.768 34.243 khz envref = 1 in cmu_lfrcoctrl, t amb > 85 c 30.474 39.7 khz envref = 0 in cmu_lfrcoctrl 30.474 32.768 33.915 khz startup time t lfrco 500 s current consumption 1 i lfrco envref = 1 in cmu_lfrcoctrl 342 na envref = 0 in cmu_lfrcoctrl 494 na note: 1. block is supplied by avdd if anasw = 0, or dvdd if anasw=1 in emu_pwrctrl register efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 36
4.1.11.4 hfrco and auxhfrco table 4.21. hfrco and auxhfrco parameter symbol test condition min typ max unit frequency accuracy f hfrco any frequency band, across sup- ply voltage and temperature -2.5 2.5 % start-up time t hfrco f hfrco 19 mhz 300 ns 4 < f hfrco < 19 mhz 1 s f hfrco 4 mhz 2.5 s current consumption on all supplies i hfrco f hfrco = 38 mhz 204 228 a f hfrco = 32 mhz 171 190 a f hfrco = 26 mhz 147 164 a f hfrco = 19 mhz 126 138 a f hfrco = 16 mhz 110 120 a f hfrco = 13 mhz 100 110 a f hfrco = 7 mhz 81 91 a f hfrco = 4 mhz 33 35 a f hfrco = 2 mhz 31 35 a f hfrco = 1 mhz 30 35 a step size ss hfrco coarse (% of period) 0.8 % fine (% of period) 0.1 % period jitter pj hfrco 0.2 % rms 4.1.11.5 ulfrco table 4.22. ulfrco parameter symbol test condition min typ max unit oscillation frequency f ulfrco 0.95 1 1.07 khz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 37
4.1.12 primary flash memory characteristics table 4.23. primary flash memory characteristics 1 parameter symbol test condition min typ max unit flash erase cycles before failure ec flash 10000 cycles flash data retention ret flash t amb 85 c 10 years t amb 125 c 10 years word (32-bit) programming time t w_prog 20 26 40 s page erase time t perase 20 27 40 ms mass erase time t merase 20 27 40 ms device erase time 2 t derase t amb 85 c 60 74 ms t amb 125 c 60 78 ms page erase current 3 i erase 3 ma mass or device erase cur- rent 3 5 ma write current 3 i write 3 ma note: 1. flash data retention information is published in the quarterly quality and reliability report. 2. device erase is issued over the aap interface and erases all flash, sram, the lock bit (lb) page, and the user data page lock word (ulw) 3. measured at 25c 4.1.13 serial flash memory characteristics table 4.24. serial flash memory characteristics parameter symbol test condition min typ max unit serial flash erase cycles be- fore failure ec sflash 100000 cycles serial flash data retention ret sflash 20 years page program time t pprog 1 to 256 bytes 0.5 0.8 ms erase time t erase 4 kbyte sector 70 300 ms 32 kbyte block 130 500 ms 64 kbyte block 200 1000 ms full erase 1.5 3 s efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 38
4.1.14 gpio table 4.25. gpio parameter symbol test condition min typ max unit input low voltage v ioil iovdd*0.3 v input high voltage v ioih iovdd*0.7 v output high voltage relative to iovdd v iooh sourcing 3 ma, iovdd 3 v, drivestrength 1 = weak iovdd*0.8 v sourcing 1.2 ma, iovdd 2.3 v, drivestrength 1 = weak iovdd*0.6 v sourcing 20 ma, iovdd 3 v, drivestrength 1 = strong iovdd*0.8 v sourcing 8 ma, iovdd 2.3 v, drivestrength 1 = strong iovdd*0.6 v output low voltage relative to iovdd v iool sinking 3 ma, iovdd 3 v, drivestrength 1 = weak iovdd*0.2 v sinking 1.2 ma, iovdd 2.3 v, drivestrength 1 = weak iovdd*0.4 v sinking 20 ma, iovdd 3 v, drivestrength 1 = strong iovdd*0.2 v sinking 8 ma, iovdd 2.3 v, drivestrength 1 = strong iovdd*0.4 v input leakage current i ioleak all gpio except lfxo pins, gpio iovdd, t amb 85 c 0.1 30 na lfxo pins, gpio iovdd, t amb 85 c 0.1 50 na all gpio except lfxo pins, gpio iovdd, t amb > 85 c 110 na lfxo pins, gpio iovdd, t amb > 85 c 250 na input leakage current on 5vtol pads above iovdd i 5vtolleak iovdd < gpio iovdd + 2 v 3.3 15 a i/o pin pull-up resistor r pu 30 43 65 k? i/o pin pull-down resistor r pd 30 43 65 k? pulse width of pulses re- moved by the glitch suppres- sion filter t ioglitch 20 25 35 ns efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 39
parameter symbol test condition min typ max unit output fall time, from 70% to 30% of v io t ioof c l = 50 pf, drivestrength 1 = strong, slewrate 1 = 0x6 1.8 ns c l = 50 pf, drivestrength 1 = weak, slewrate 1 = 0x6 4.5 ns output rise time, from 30% to 70% of v io t ioor c l = 50 pf, drivestrength 1 = strong, slewrate = 0x6 1 2.2 ns c l = 50 pf, drivestrength 1 = weak, slewrate 1 = 0x6 7.4 ns note: 1. in gpio_pn_ctrl register 4.1.15 vmon table 4.26. vmon parameter symbol test condition min typ max unit vmon supply current i vmon in em0 or em1, 1 supply moni- tored 5.8 8.26 a in em0 or em1, 4 supplies moni- tored 11.8 16.8 a in em2, em3 or em4, 1 supply monitored 62 na in em2, em3 or em4, 4 supplies monitored 99 na vmon loading of monitored supply i sense in em0 or em1 2 a in em2, em3 or em4 2 na threshold range v vmon_range 1.62 3.4 v threshold step size n vmon_stesp coarse 200 mv fine 20 mv response time t vmon_res supply drops at 1v/s rate 460 ns hysteresis v vmon_hyst 26 mv efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 40
4.1.16 adc table 4.27. adc parameter symbol test condition min typ max unit resolution v resolution 6 12 bits input voltage range v adcin single ended 0 2*v ref v differential -v ref v ref v input range of external refer- ence voltage, single ended and differential v adcrefin_p 1 v avdd v power supply rejection 1 psrr adc at dc 80 db analog input common mode rejection ratio cmrr adc at dc 80 db current from all supplies, us- ing internal reference buffer. continous operation. war- mupmode 2 = keepadc- warm i adc_conti- nous_lp 1 msps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 1 3 301 350 a 250 ksps / 4 mhz adcclk, bia- sprog = 6, gpbiasacc = 1 3 149 a 62.5 ksps / 1 mhz adcclk, biasprog = 15, gpbiasacc = 1 3 91 a current from all supplies, us- ing internal reference buffer. duty-cycled operation. war- mupmode 2 = normal i adc_normal_lp 35 ksps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 1 3 51 a 5 ksps / 16 mhz adcclk biasprog = 0, gpbiasacc = 1 3 9 a current from all supplies, us- ing internal reference buffer. duty-cycled operation. awarmupmode 2 = keep- instandby or keepin- slowacc i adc_stand- by_lp 125 ksps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 1 3 117 a 35 ksps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 1 3 79 a current from all supplies, us- ing internal reference buffer. continous operation. war- mupmode 2 = keepadc- warm i adc_conti- nous_hp 1 msps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 0 3 345 a 250 ksps / 4 mhz adcclk, bia- sprog = 6, gpbiasacc = 0 3 191 a 62.5 ksps / 1 mhz adcclk, biasprog = 15, gpbiasacc = 0 3 132 a efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 41
parameter symbol test condition min typ max unit current from all supplies, us- ing internal reference buffer. duty-cycled operation. war- mupmode 2 = normal i adc_normal_hp 35 ksps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 0 3 102 a 5 ksps / 16 mhz adcclk biasprog = 0, gpbiasacc = 0 3 17 a current from all supplies, us- ing internal reference buffer. duty-cycled operation. awarmupmode 2 = keep- instandby or keepin- slowacc i adc_stand- by_hp 125 ksps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 0 3 162 a 35 ksps / 16 mhz adcclk, biasprog = 0, gpbiasacc = 0 3 123 a current from hfperclk i adc_clk hfperclk = 16 mhz 140 a adc clock frequency f adcclk 16 mhz throughput rate f adcrate 1 msps conversion time 4 t adcconv 6 bit 7 cycles 8 bit 9 cycles 12 bit 13 cycles startup time of reference generator and adc core t adcstart warmupmode 2 = normal 5 s warmupmode 2 = keepin- standby 2 s warmupmode 2 = keepinslo- wacc 1 s sndr at 1msps and f in = 10khz sndr adc internal reference, 2.5 v full-scale, differential (-1.25, 1.25) 58 67 db vrefp_in = 1.25 v direct mode with 2.5 v full-scale, differential 68 db spurious-free dynamic range (sfdr) sfdr adc 1 msamples/s, 10 khz full-scale sine wave 75 db input referred adc noise, rms v ref_noise including quantization noise and distortion 380 v offset error v adcoffseterr -3 0.25 3 lsb gain error in adc v adc_gain using internal reference -0.2 5 % using external reference -1 % differential non-linearity (dnl) dnl adc 12 bit resolution -1 2 lsb integral non-linearity (inl), end point method inl adc 12 bit resolution -6 6 lsb temperature sensor slope v ts_slope -1.84 mv/c efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 42
parameter symbol test condition min typ max unit note: 1. psrr is referenced to avdd when anasw=0 and to dvdd when anasw=1 in emu_pwrctrl 2. in adcn_cntl register 3. in adcn_biasprog register 4. derived from adcclk efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 43
4.1.17 idac table 4.28. idac parameter symbol test condition min typ max unit number of ranges n idac_ranges 4 - output current i idac_out rangsel 1 = range0 0.05 1.6 a rangsel 1 = range1 1.6 4.7 a rangsel 1 = range2 0.5 16 a rangsel 1 = range3 2 64 a linear steps within each range n idac_steps 32 step size ss idac rangsel 1 = range0 50 na rangsel 1 = range1 100 na rangsel 1 = range2 500 na rangsel 1 = range3 2 a total accuracy, stepsel 1 = 0x10 acc idac em0 or em1, avdd=3.3 v, t = 25 c -2 2 % em0 or em1 -18 22 % em2 or em3, source mode, rangsel 1 = range0, avdd=3.3 v, t = 25 c -2 % em2 or em3, source mode, rangsel 1 = range1, avdd=3.3 v, t = 25 c -1.7 % em2 or em3, source mode, rangsel 1 = range2, avdd=3.3 v, t = 25 c -0.8 % em2 or em3, source mode, rangsel 1 = range3, avdd=3.3 v, t = 25 c -0.5 % em2 or em3, sink mode, rang- sel 1 = range0, avdd=3.3 v, t = 25 c -0.7 % em2 or em3, sink mode, rang- sel 1 = range1, avdd=3.3 v, t = 25 c -0.6 % em2 or em3, sink mode, rang- sel 1 = range2, avdd=3.3 v, t = 25 c -0.5 % em2 or em3, sink mode, rang- sel 1 = range3, avdd=3.3 v, t = 25 c -0.5 % start up time t idac_su output within 1% of steady state value 5 s efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 44
parameter symbol test condition min typ max unit settling time, (output settled within 1% of steady state val- ue) t idac_settle range setting is changed 5 s step value is changed 1 s current consumption in em0 or em1 2 i idac source mode, excluding output current 8.9 13 a sink mode, excluding output cur- rent 12 16 a current consumption in em2 or em3 2 source mode, excluding output current, duty cycle mode, t = 25 c 1.04 a sink mode, excluding output cur- rent, duty cycle mode, t = 25 c 1.08 a source mode, excluding output current, duty cycle mode, t 85 c 8.9 a sink mode, excluding output cur- rent, duty cycle mode, t 85 c 12 a output voltage compliance in source mode, source current change relative to current sourced at 0 v i comp_src rangesel1=0, output voltage = min(v iovdd , v avdd 2 -100 mv) 0.04 % rangesel1=1, output voltage = min(v iovdd , v avdd 2 -100 mv) 0.02 % rangesel1=2, output voltage = min(v iovdd , v avdd 2 -150 mv) 0.02 % rangesel1=3, output voltage = min(v iovdd , v avdd 2 -250 mv) 0.02 % output voltage compliance in sink mode, sink current change relative to current sunk at iovdd i comp_sink rangesel1=0, output voltage = 100 mv 0.18 % rangesel1=1, output voltage = 100 mv 0.12 % rangesel1=2, output voltage = 150 mv 0.08 % rangesel1=3, output voltage = 250 mv 0.02 % note: 1. in idac_curprog register 2. the idac is supplied by either avdd, dvdd, or iovdd based on the setting of anasw in the emu_pwrctrl register and pwrsel in the idac_ctrl register. setting pwrsel to 1 selects iovdd. with pwrsel cleared to 0, anasw selects be- tween avdd (0) and dvdd (1). efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 45
4.1.18 analog comparator (acmp) table 4.29. acmp parameter symbol test condition min typ max unit input voltage range v acmpin acmpvdd = acmpn_ctrl_pwrsel 1 0 v acmpvdd v supply voltage v acmpvdd biasprog 2 0x10 or full- bias 2 = 0 1.85 v vregvdd_ max v 0x10 < biasprog 2 0x20 and fullbias 2 = 1 2.1 v vregvdd_ max v active current not including voltage reference i acmp biasprog 2 = 1, fullbias 2 = 0 50 na biasprog 2 = 0x10, fullbias 2 = 0 306 na biasprog 2 = 0x20, fullbias 2 = 1 74 95 a current consumption of inter- nal voltage reference i acmpref vlp selected as input using 2.5 v reference / 4 (0.625 v) 50 na vlp selected as input using vdd 20 na vbdiv selected as input using 1.25 v reference / 1 4.1 a vadiv selected as input using vdd/1 2.4 a hysteresis (v cm = 1.25 v, biasprog 2 = 0x10, full- bias 2 = 1) v acmphyst hystsel 3 = hyst0 -1.75 0 1.75 mv hystsel 3 = hyst1 10 18 26 mv hystsel 3 = hyst2 21 32 46 mv hystsel 3 = hyst3 27 44 63 mv hystsel 3 = hyst4 32 55 80 mv hystsel 3 = hyst5 38 65 100 mv hystsel 3 = hyst6 43 77 121 mv hystsel 3 = hyst7 47 86 148 mv hystsel 3 = hyst8 -4 0 4 mv hystsel 3 = hyst9 -27 -18 -10 mv hystsel 3 = hyst10 -47 -32 -18 mv hystsel 3 = hyst11 -64 -43 -27 mv hystsel 3 = hyst12 -78 -54 -32 mv hystsel 3 = hyst13 -93 -64 -37 mv hystsel 3 = hyst14 -113 -74 -42 mv hystsel 3 = hyst15 -135 -85 -47 mv efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 46
parameter symbol test condition min typ max unit comparator delay 4 t acmpdelay biasprog 2 = 1, fullbias 2 = 0 30 s biasprog 2 = 0x10, fullbias 2 = 0 3.7 s biasprog 2 = 0x20, fullbias 2 = 1 35 ns offset voltage v acmpoffset biasprog 2 =0x10, fullbias 2 = 1 -35 35 mv reference voltage v acmpref internal 1.25 v reference 1 1.25 1.47 v internal 2.5 v reference 2 2.5 2.8 v capacitive sense internal resistance r csres csressel 5 = 0 inf k? csressel 5 = 1 15 k? csressel 5 = 2 27 k? csressel 5 = 3 39 k? csressel 5 = 4 51 k? csressel 5 = 5 102 k? csressel 5 = 6 164 k? csressel 5 = 7 239 k? note: 1. acmpvdd is a supply chosen by the setting in acmpn_ctrl_pwrsel and may be iovdd, avdd or dvdd 2. in acmpn_ctrl register 3. in acmpn_hysteresis register 4. 100 mv differential drive 5. in acmpn_inputsel register the total acmp current is the sum of the contributions from the acmp and its internal voltage reference as given as: i acmptotal = i acmp + i acmpref i acmpref is zero if an external voltage reference is used. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 47
4.1.19 i2c i2c standard-mode (sm) table 4.30. i2c standard-mode (sm) 1 parameter symbol test condition min typ max unit scl clock frequency 2 f scl 0 100 khz scl clock low time t low 4.7 s scl clock high time t high 4 s sda set-up time t su,dat 250 ns sda hold time 3 t hd,dat 100 3450 ns repeated start condition set-up time t su,sta 4.7 s (repeated) start condition hold time t hd,sta 4 s stop condition set-up time t su,sto 4 s bus free time between a stop and start condition t buf 4.7 s note: 1. for clhr set to 0 in the i2cn_ctrl register 2. for the minimum hfperclk frequency required in standard-mode, refer to the i2c chapter in the reference manual 3. the maximum sda hold time (t hd,dat ) needs to be met only when the device does not stretch the low time of scl (t low ) efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 48
i2c fast-mode (fm) table 4.31. i2c fast-mode (fm) 1 parameter symbol test condition min typ max unit scl clock frequency 2 f scl 0 400 khz scl clock low time t low 1.3 s scl clock high time t high 0.6 s sda set-up time t su,dat 100 ns sda hold time 3 t hd,dat 100 900 ns repeated start condition set-up time t su,sta 0.6 s (repeated) start condition hold time t hd,sta 0.6 s stop condition set-up time t su,sto 0.6 s bus free time between a stop and start condition t buf 1.3 s note: 1. for clhr set to 1 in the i2cn_ctrl register 2. for the minimum hfperclk frequency required in fast-mode, refer to the i2c chapter in the reference manual 3. the maximum sda hold time (t hd,dat ) needs to be met only when the device does not stretch the low time of scl (t low ) i2c fast-mode plus (fm+) table 4.32. i2c fast-mode plus (fm+) 1 parameter symbol test condition min typ max unit scl clock frequency 2 f scl 0 1000 khz scl clock low time t low 0.5 s scl clock high time t high 0.26 s sda set-up time t su,dat 50 ns sda hold time t hd,dat 100 ns repeated start condition set-up time t su,sta 0.26 s (repeated) start condition hold time t hd,sta 0.26 s stop condition set-up time t su,sto 0.26 s bus free time between a stop and start condition t buf 0.5 s note: 1. for clhr set to 0 or 1 in the i2cn_ctrl register 2. for the minimum hfperclk frequency required in fast-mode plus, refer to the i2c chapter in the reference manual efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 49
4.1.20 usart spi spi master timing table 4.33. spi master timing parameter symbol test condition min typ max unit sclk period 1 2 t sclk 2 * t hfperclk ns cs to mosi 1 2 t cs_mo 0 8 ns sclk to mosi 1 2 t sclk_mo 3 20 ns miso setup time 1 2 t su_mi iovdd = 2.3 v 56 ns iovdd = 3.0 v 37 ns miso hold time 1 2 t h_mi 6 ns note: 1. applies for both clkpha = 0 and clkpha = 1 (figure only shows clkpha = 0) 2. measurement done with 8 pf output loading at 10% and 90% of v dd (figure shows 50% of v dd ) cs sclk clkpol = 0 mosi miso t cs_mo t h_mi t su_mi t sckl_mo t sclk sclk clkpol = 1 figure 4.1. spi master timing diagram efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 50
spi slave timing table 4.34. spi slave timing parameter symbol test condition min typ max unit sckl period 1 2 t sclk_sl 2 * t hfperclk ns sclk high period 1 2 t sclk_hi 3 * t hfperclk ns sclk low period 1 2 t sclk_lo 3 * t hfperclk ns cs active to miso 1 2 t cs_act_mi 4 50 ns cs disable to miso 1 2 t cs_dis_mi 4 50 ns mosi setup time 1 2 t su_mo 4 ns mosi hold time 1 2 t h_mo 3 + 2 * t hfperclk ns sclk to miso 1 2 t sclk_mi 16 + t hfperclk 66 + 2 * t hfperclk ns note: 1. applies for both clkpha = 0 and clkpha = 1 (figure only shows clkpha = 0) 2. measurement done with 8 pf output loading at 10% and 90% of v dd (figure shows 50% of v dd ) cs sclk clkpol = 0 mosi miso t cs_act_mi t sclk_hi t sclk t su_mo t h_mo t sclk_mi t cs_dis_mi t sclk_lo sclk clkpol = 1 figure 4.2. spi slave timing diagram 4.2 typical performance curves typical performance curves indicate typical characterized performance under the stated conditions. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 51
4.2.1 supply current figure 4.3. em0 active mode typical supply current figure 4.4. em1 sleep mode typical supply current typical supply current for em2, em3 and em4h using standard software libraries from silicon laboratories. efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 52
figure 4.5. em2, em3, em4h and em4s typical supply current efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 53
4.2.2 dc-dc converter default test conditions: ccm mode, ldcdc = 4.7 h, cdcdc = 1.0 f, vdcdc_i = 3.3 v, vdcdc_o = 1.8 v, fdcdc_ln = 7 mhz figure 4.6. dc-dc converter typical performance characteristics efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 54
100 s/div 10 s/div 2v/div o f fset :1.8v 50mv/div o f fset :1.8v 100ma 1ma i load 60mv/div o f fset :1.8v v sw dvdd dvdd load step response in ln (ccm) mode ( heavy drive) ln (ccm) and lp mode transition (load: 5ma) figure 4.7. dc-dc converter transition waveforms efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 55
4.2.3 internal oscillators figure 4.8. hfrco and auxhfrco typical performance at 38 mhz figure 4.9. hfrco and auxhfrco typical performance at 32 mhz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 56
figure 4.10. hfrco and auxhfrco typical performance at 26 mhz figure 4.11. hfrco and auxhfrco typical performance at 19 mhz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 57
figure 4.12. hfrco and auxhfrco typical performance at 16 mhz figure 4.13. hfrco and auxhfrco typical performance at 13 mhz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 58
figure 4.14. hfrco and auxhfrco typical performance at 7 mhz figure 4.15. hfrco and auxhfrco typical performance at 4 mhz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 59
figure 4.16. hfrco and auxhfrco typical performance at 2 mhz figure 4.17. hfrco and auxhfrco typical performance at 1 mhz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 60
figure 4.18. lfrco typical performance at 32.768 khz figure 4.19. ulfrco typical performance at 1 khz efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 61
4.2.4 2.4 ghz radio figure 4.20. 2.4 ghz rf transmitter output power efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 62
figure 4.21. 2.4 ghz rf receiver sensitivity efr32mg1 mighty gecko soc with integrated serial flash data sheet electrical specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 63
5. typical connection diagrams 5.1 power typical power supply connections for direct supply, without using the internal dc-dc converter, are shown in the following figure. main supply v dd vregvdd avdd iovdd vregsw vregvss dvdd decouple rfvdd pavdd hfxtal_n hfxtal_p lfxtal_n lfxtal_p + C figure 5.1. efr32mg1 typical application circuit: direct supply configuration without dc-dc converter typical power supply circuits using the internal dc-dc converter are shown below. the mcu operates from the dc-dc converter sup- ply. for low rf transmit power applications less than 13dbm, the rf pa may be supplied by the dc-dc converter. for opns support- ing high power rf transmission, the rf pa must be directly supplied by vdd for rf transmit power greater than 13 dbm. main supply v dcdc v dd vregvdd avdd iovdd vregsw vregvss dvdd decouple rfvdd pavdd hfxtal_n hfxtal_p lfxtal_n lfxtal_p + C figure 5.2. efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdcdc) efr32mg1 mighty gecko soc with integrated serial flash data sheet typical connection diagrams silabs.com | smart. connected. energy-friendly. rev. 1.0 | 64
main supply v dcdc v dd vregvdd avdd iovdd vregsw vregvss dvdd decouple rfvdd pavdd hfxtal_n hfxtal_p lfxtal_n lfxtal_p + C figure 5.3. efr32mg1 typical application circuit: configuration with dc-dc converter (pavdd from vdd) 5.2 rf matching networks typical rf matching network circuit diagrams are shown in figure 5.4 typical 2.4 ghz rf impedance-matching network circuits on page 65 for applications in the 2.4ghz band. application-specific component values can be found in the efr32 reference manual . for low rf transmit power applications less than 13dbm, the two-element match is recommended. for opns supporting high power rf transmission, the four-element match is recommended for high rf transmit power (> 13dbm). 2-element match for 2.4ghz band 4-element match for 2.4ghz band l0 c0 50 2g4rf_iop 2g4rf_ion 2g4rf_ion 2g4rf_iop l0 l1 c0 c1 50 pavdd pavdd pavdd pavdd figure 5.4. typical 2.4 ghz rf impedance-matching network circuits 5.3 other connections other components or connections may be required to meet the system-level requirements. application note an0002: "hardware de- sign considerations" contains detailed information on these connections. application notes can be accessed on the silicon labs web- site ( www.silabs.com/32bit-appnotes ). efr32mg1 mighty gecko soc with integrated serial flash data sheet typical connection diagrams silabs.com | smart. connected. energy-friendly. rev. 1.0 | 65
6. pin definitions 6.1 efr32mg1 qfn32 2.4 ghz definition figure 6.1. efr32mg1 qfn32 2.4 ghz pinout efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 66
table 6.1. qfn32 2.4 ghz device pinout qfn32 pin# and name pin alternate functionality / description pin # pin name analog timers communication radio other 0 vss ground 1 pf0 busax [adc0: aport1xch16 acmp0: aport1xch16 acmp1: aport1xch16] busby [adc0: aport2ych16 acmp0: aport2ych16 acmp1: aport2ych16] tim0_cc0 #24 tim0_cc1 #23 tim0_cc2 #22 tim0_cdti0 #21 tim0_cdti1 #20 tim0_cdti2 #19 tim1_cc0 #24 tim1_cc1 #23 tim1_cc2 #22 tim1_cc3 #21 le- tim0_out0 #24 letim0_out1 #23 pcnt0_s0in #24 pcnt0_s1in #23 us0_tx #24 us0_rx #23 us0_clk #22 us0_cs #21 us0_cts #20 us0_rts #19 leu0_tx #24 leu0_rx #23 i2c0_sda #24 i2c0_scl #23 frc_dclk #24 frc_dout #23 frc_dframe #22 modem_dclk #24 modem_din #23 modem_dout #22 modem_ant0 #21 modem_ant1 #20 prs_ch0 #0 prs_ch1 #7 prs_ch2 #6 prs_ch3 #5 acmp0_o #24 acmp1_o #24 dbg_swclktck #0 2 pf1 busay [adc0: aport1ych17 acmp0: aport1ych17 acmp1: aport1ych17] busbx [adc0: aport2xch17 acmp0: aport2xch17 acmp1: aport2xch17] tim0_cc0 #25 tim0_cc1 #24 tim0_cc2 #23 tim0_cdti0 #22 tim0_cdti1 #21 tim0_cdti2 #20 tim1_cc0 #25 tim1_cc1 #24 tim1_cc2 #23 tim1_cc3 #22 le- tim0_out0 #25 letim0_out1 #24 pcnt0_s0in #25 pcnt0_s1in #24 us0_tx #25 us0_rx #24 us0_clk #23 us0_cs #22 us0_cts #21 us0_rts #20 leu0_tx #25 leu0_rx #24 i2c0_sda #25 i2c0_scl #24 frc_dclk #25 frc_dout #24 frc_dframe #23 modem_dclk #25 modem_din #24 modem_dout #23 modem_ant0 #22 modem_ant1 #21 prs_ch0 #1 prs_ch1 #0 prs_ch2 #7 prs_ch3 #6 acmp0_o #25 acmp1_o #25 dbg_swdiotms #0 3 pf2 busax [adc0: aport1xch18 acmp0: aport1xch18 acmp1: aport1xch18] busby [adc0: aport2ych18 acmp0: aport2ych18 acmp1: aport2ych18] tim0_cc0 #26 tim0_cc1 #25 tim0_cc2 #24 tim0_cdti0 #23 tim0_cdti1 #22 tim0_cdti2 #21 tim1_cc0 #26 tim1_cc1 #25 tim1_cc2 #24 tim1_cc3 #23 le- tim0_out0 #26 letim0_out1 #25 pcnt0_s0in #26 pcnt0_s1in #25 us0_tx #26 us0_rx #25 us0_clk #24 us0_cs #23 us0_cts #22 us0_rts #21 leu0_tx #26 leu0_rx #25 i2c0_sda #26 i2c0_scl #25 frc_dclk #26 frc_dout #25 frc_dframe #24 modem_dclk #26 modem_din #25 modem_dout #24 modem_ant0 #23 modem_ant1 #22 cmu_clk0 #6 prs_ch0 #2 prs_ch1 #1 prs_ch2 #0 prs_ch3 #7 acmp0_o #26 acmp1_o #26 dbg_tdo #0 dbg_swo #0 gpio_em4wu0 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 67
qfn32 pin# and name pin alternate functionality / description pin # pin name analog timers communication radio other 4 pf3 busay [adc0: aport1ych19 acmp0: aport1ych19 acmp1: aport1ych19] busbx [adc0: aport2xch19 acmp0: aport2xch19 acmp1: aport2xch19] tim0_cc0 #27 tim0_cc1 #26 tim0_cc2 #25 tim0_cdti0 #24 tim0_cdti1 #23 tim0_cdti2 #22 tim1_cc0 #27 tim1_cc1 #26 tim1_cc2 #25 tim1_cc3 #24 le- tim0_out0 #27 letim0_out1 #26 pcnt0_s0in #27 pcnt0_s1in #26 us0_tx #27 us0_rx #26 us0_clk #25 us0_cs #24 us0_cts #23 us0_rts #22 leu0_tx #27 leu0_rx #26 i2c0_sda #27 i2c0_scl #26 frc_dclk #27 frc_dout #26 frc_dframe #25 modem_dclk #27 modem_din #26 modem_dout #25 modem_ant0 #24 modem_ant1 #23 cmu_clk1 #6 prs_ch0 #3 prs_ch1 #2 prs_ch2 #1 prs_ch3 #0 acmp0_o #27 acmp1_o #27 dbg_tdi #0 5 rfvdd radio power supply 6 hfxtal_n high frequency crystal input pin. 7 hfxtal_p high frequency crystal output pin. 8 resetn reset input, active low.to apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up ensure that reset is released. 9 rfvss radio ground 10 pavss power amplifier (pa) voltage regulator vss 11 2g4rf_ion 2.4 ghz differential rf input/output, negative path. this pin should be externally grounded. 12 2g4rf_iop 2.4 ghz differential rf input/output, positive path. 13 pavdd power amplifier (pa) voltage regulator vdd input 14 pd13 buscy [adc0: aport3ych5 acmp0: aport3ych5 acmp1: aport3ych5 idac0: aport1ych5] busdx [adc0: aport4xch5 acmp0: aport4xch5 acmp1: aport4xch5] tim0_cc0 #21 tim0_cc1 #20 tim0_cc2 #19 tim0_cdti0 #18 tim0_cdti1 #17 tim0_cdti2 #16 tim1_cc0 #21 tim1_cc1 #20 tim1_cc2 #19 tim1_cc3 #18 le- tim0_out0 #21 letim0_out1 #20 pcnt0_s0in #21 pcnt0_s1in #20 us0_tx #21 us0_rx #20 us0_clk #19 us0_cs #18 us0_cts #17 us0_rts #16 leu0_tx #21 leu0_rx #20 i2c0_sda #21 i2c0_scl #20 frc_dclk #21 frc_dout #20 frc_dframe #19 modem_dclk #21 modem_din #20 modem_dout #19 modem_ant0 #18 modem_ant1 #17 prs_ch3 #12 prs_ch4 #4 prs_ch5 #3 prs_ch6 #15 acmp0_o #21 acmp1_o #21 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 68
qfn32 pin# and name pin alternate functionality / description pin # pin name analog timers communication radio other 15 pd14 buscx [adc0: aport3xch6 acmp0: aport3xch6 acmp1: aport3xch6 idac0: aport1xch6] busdy [adc0: aport4ych6 acmp0: aport4ych6 acmp1: aport4ych6] tim0_cc0 #22 tim0_cc1 #21 tim0_cc2 #20 tim0_cdti0 #19 tim0_cdti1 #18 tim0_cdti2 #17 tim1_cc0 #22 tim1_cc1 #21 tim1_cc2 #20 tim1_cc3 #19 le- tim0_out0 #22 letim0_out1 #21 pcnt0_s0in #22 pcnt0_s1in #21 us0_tx #22 us0_rx #21 us0_clk #20 us0_cs #19 us0_cts #18 us0_rts #17 leu0_tx #22 leu0_rx #21 i2c0_sda #22 i2c0_scl #21 frc_dclk #22 frc_dout #21 frc_dframe #20 modem_dclk #22 modem_din #21 modem_dout #20 modem_ant0 #19 modem_ant1 #18 cmu_clk0 #5 prs_ch3 #13 prs_ch4 #5 prs_ch5 #4 prs_ch6 #16 acmp0_o #22 acmp1_o #22 gpio_em4wu4 16 pd15 buscy [adc0: aport3ych7 acmp0: aport3ych7 acmp1: aport3ych7 idac0: aport1ych7] busdx [adc0: aport4xch7 acmp0: aport4xch7 acmp1: aport4xch7] tim0_cc0 #23 tim0_cc1 #22 tim0_cc2 #21 tim0_cdti0 #20 tim0_cdti1 #19 tim0_cdti2 #18 tim1_cc0 #23 tim1_cc1 #22 tim1_cc2 #21 tim1_cc3 #20 le- tim0_out0 #23 letim0_out1 #22 pcnt0_s0in #23 pcnt0_s1in #22 us0_tx #23 us0_rx #22 us0_clk #21 us0_cs #20 us0_cts #19 us0_rts #18 leu0_tx #23 leu0_rx #22 i2c0_sda #23 i2c0_scl #22 frc_dclk #23 frc_dout #22 frc_dframe #21 modem_dclk #23 modem_din #22 modem_dout #21 modem_ant0 #20 modem_ant1 #19 cmu_clk1 #5 prs_ch3 #14 prs_ch4 #6 prs_ch5 #5 prs_ch6 #17 acmp0_o #23 acmp1_o #23 dbg_swo #2 17 pa0 adc0_extn buscx [adc0: aport3xch8 acmp0: aport3xch8 acmp1: aport3xch8 idac0: aport1xch8] busdy [adc0: aport4ych8 acmp0: aport4ych8 acmp1: aport4ych8] tim0_cc0 #0 tim0_cc1 #31 tim0_cc2 #30 tim0_cdti0 #29 tim0_cdti1 #28 tim0_cdti2 #27 tim1_cc0 #0 tim1_cc1 #31 tim1_cc2 #30 tim1_cc3 #29 le- tim0_out0 #0 le- tim0_out1 #31 pcnt0_s0in #0 pcnt0_s1in #31 us0_tx #0 us0_rx #31 us0_clk #30 us0_cs #29 us0_cts #28 us0_rts #27 leu0_tx #0 leu0_rx #31 i2c0_sda #0 i2c0_scl #31 frc_dclk #0 frc_dout #31 frc_dframe #30 modem_dclk #0 modem_din #31 modem_dout #30 modem_ant0 #29 modem_ant1 #28 cmu_clk1 #0 prs_ch6 #0 prs_ch7 #10 prs_ch8 #9 prs_ch9 #8 acmp0_o #0 acmp1_o #0 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 69
qfn32 pin# and name pin alternate functionality / description pin # pin name analog timers communication radio other 18 pa1 adc0_extp buscy [adc0: aport3ych9 acmp0: aport3ych9 acmp1: aport3ych9 idac0: aport1ych9] busdx [adc0: aport4xch9 acmp0: aport4xch9 acmp1: aport4xch9] tim0_cc0 #1 tim0_cc1 #0 tim0_cc2 #31 tim0_cdti0 #30 tim0_cdti1 #29 tim0_cdti2 #28 tim1_cc0 #1 tim1_cc1 #0 tim1_cc2 #31 tim1_cc3 #30 le- tim0_out0 #1 le- tim0_out1 #0 pcnt0_s0in #1 pcnt0_s1in #0 us0_tx #1 us0_rx #0 us0_clk #31 us0_cs #30 us0_cts #29 us0_rts #28 leu0_tx #1 leu0_rx #0 i2c0_sda #1 i2c0_scl #0 frc_dclk #1 frc_dout #0 frc_dframe #31 modem_dclk #1 modem_din #0 modem_dout #31 modem_ant0 #30 modem_ant1 #29 cmu_clk0 #0 prs_ch6 #1 prs_ch7 #0 prs_ch8 #10 prs_ch9 #9 acmp0_o #1 acmp1_o #1 19 pb11 buscy [adc0: aport3ych27 acmp0: aport3ych27 acmp1: aport3ych27 idac0: aport1ych27] busdx [adc0: aport4xch27 acmp0: aport4xch27 acmp1: aport4xch27] tim0_cc0 #6 tim0_cc1 #5 tim0_cc2 #4 tim0_cdti0 #3 tim0_cdti1 #2 tim0_cdti2 #1 tim1_cc0 #6 tim1_cc1 #5 tim1_cc2 #4 tim1_cc3 #3 le- tim0_out0 #6 le- tim0_out1 #5 pcnt0_s0in #6 pcnt0_s1in #5 us0_tx #6 us0_rx #5 us0_clk #4 us0_cs #3 us0_cts #2 us0_rts #1 leu0_tx #6 leu0_rx #5 i2c0_sda #6 i2c0_scl #5 frc_dclk #6 frc_dout #5 frc_dframe #4 modem_dclk #6 modem_din #5 modem_dout #4 modem_ant0 #3 modem_ant1 #2 prs_ch6 #6 prs_ch7 #5 prs_ch8 #4 prs_ch9 #3 acmp0_o #6 acmp1_o #6 20 pb12 buscx [adc0: aport3xch28 acmp0: aport3xch28 acmp1: aport3xch28 idac0: aport1xch28] busdy [adc0: aport4ych28 acmp0: aport4ych28 acmp1: aport4ych28] tim0_cc0 #7 tim0_cc1 #6 tim0_cc2 #5 tim0_cdti0 #4 tim0_cdti1 #3 tim0_cdti2 #2 tim1_cc0 #7 tim1_cc1 #6 tim1_cc2 #5 tim1_cc3 #4 le- tim0_out0 #7 le- tim0_out1 #6 pcnt0_s0in #7 pcnt0_s1in #6 us0_tx #7 us0_rx #6 us0_clk #5 us0_cs #4 us0_cts #3 us0_rts #2 leu0_tx #7 leu0_rx #6 i2c0_sda #7 i2c0_scl #6 frc_dclk #7 frc_dout #6 frc_dframe #5 modem_dclk #7 modem_din #6 modem_dout #5 modem_ant0 #4 modem_ant1 #3 prs_ch6 #7 prs_ch7 #6 prs_ch8 #5 prs_ch9 #4 acmp0_o #7 acmp1_o #7 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 70
qfn32 pin# and name pin alternate functionality / description pin # pin name analog timers communication radio other 21 pb13 buscy [adc0: aport3ych29 acmp0: aport3ych29 acmp1: aport3ych29 idac0: aport1ych29] busdx [adc0: aport4xch29 acmp0: aport4xch29 acmp1: aport4xch29] tim0_cc0 #8 tim0_cc1 #7 tim0_cc2 #6 tim0_cdti0 #5 tim0_cdti1 #4 tim0_cdti2 #3 tim1_cc0 #8 tim1_cc1 #7 tim1_cc2 #6 tim1_cc3 #5 le- tim0_out0 #8 le- tim0_out1 #7 pcnt0_s0in #8 pcnt0_s1in #7 us0_tx #8 us0_rx #7 us0_clk #6 us0_cs #5 us0_cts #4 us0_rts #3 leu0_tx #8 leu0_rx #7 i2c0_sda #8 i2c0_scl #7 frc_dclk #8 frc_dout #7 frc_dframe #6 modem_dclk #8 modem_din #7 modem_dout #6 modem_ant0 #5 modem_ant1 #4 prs_ch6 #8 prs_ch7 #7 prs_ch8 #6 prs_ch9 #5 acmp0_o #8 acmp1_o #8 dbg_swo #1 gpio_em4wu9 22 avdd analog power supply. 23 pb14 lfxtal_n buscx [adc0: aport3xch30 acmp0: aport3xch30 acmp1: aport3xch30 idac0: aport1xch30] busdy [adc0: aport4ych30 acmp0: aport4ych30 acmp1: aport4ych30] tim0_cc0 #9 tim0_cc1 #8 tim0_cc2 #7 tim0_cdti0 #6 tim0_cdti1 #5 tim0_cdti2 #4 tim1_cc0 #9 tim1_cc1 #8 tim1_cc2 #7 tim1_cc3 #6 le- tim0_out0 #9 le- tim0_out1 #8 pcnt0_s0in #9 pcnt0_s1in #8 us0_tx #9 us0_rx #8 us0_clk #7 us0_cs #6 us0_cts #5 us0_rts #4 leu0_tx #9 leu0_rx #8 i2c0_sda #9 i2c0_scl #8 frc_dclk #9 frc_dout #8 frc_dframe #7 modem_dclk #9 modem_din #8 modem_dout #7 modem_ant0 #6 modem_ant1 #5 cmu_clk1 #1 prs_ch6 #9 prs_ch7 #8 prs_ch8 #7 prs_ch9 #6 acmp0_o #9 acmp1_o #9 24 pb15 lfxtal_p buscy [adc0: aport3ych31 acmp0: aport3ych31 acmp1: aport3ych31 idac0: aport1ych31] busdx [adc0: aport4xch31 acmp0: aport4xch31 acmp1: aport4xch31] tim0_cc0 #10 tim0_cc1 #9 tim0_cc2 #8 tim0_cdti0 #7 tim0_cdti1 #6 tim0_cdti2 #5 tim1_cc0 #10 tim1_cc1 #9 tim1_cc2 #8 tim1_cc3 #7 le- tim0_out0 #10 letim0_out1 #9 pcnt0_s0in #10 pcnt0_s1in #9 us0_tx #10 us0_rx #9 us0_clk #8 us0_cs #7 us0_cts #6 us0_rts #5 leu0_tx #10 leu0_rx #9 i2c0_sda #10 i2c0_scl #9 frc_dclk #10 frc_dout #9 frc_dframe #8 modem_dclk #10 modem_din #9 modem_dout #8 modem_ant0 #7 modem_ant1 #6 cmu_clk0 #1 prs_ch6 #10 prs_ch7 #9 prs_ch8 #8 prs_ch9 #7 acmp0_o #10 acmp1_o #10 25 vregvss voltage regulator vss 26 vregsw dcdc regulator switching node 27 vregvdd voltage regulator vdd input 28 dvdd digital power supply. 29 decouple decouple output for on-chip voltage regulator. an external decoupling capacitor is required at this pin. efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 71
qfn32 pin# and name pin alternate functionality / description pin # pin name analog timers communication radio other 30 iovdd digital io power supply. 31 pc10 busax [adc0: aport1xch10 acmp0: aport1xch10 acmp1: aport1xch10] busby [adc0: aport2ych10 acmp0: aport2ych10 acmp1: aport2ych10] tim0_cc0 #15 tim0_cc1 #14 tim0_cc2 #13 tim0_cdti0 #12 tim0_cdti1 #11 tim0_cdti2 #10 tim1_cc0 #15 tim1_cc1 #14 tim1_cc2 #13 tim1_cc3 #12 le- tim0_out0 #15 letim0_out1 #14 pcnt0_s0in #15 pcnt0_s1in #14 us0_tx #15 us0_rx #14 us0_clk #13 us0_cs #12 us0_cts #11 us0_rts #10 leu0_tx #15 leu0_rx #14 i2c0_sda #15 i2c0_scl #14 frc_dclk #15 frc_dout #14 frc_dframe #13 modem_dclk #15 modem_din #14 modem_dout #13 modem_ant0 #12 modem_ant1 #11 cmu_clk1 #3 prs_ch0 #12 prs_ch9 #15 prs_ch10 #4 prs_ch11 #3 acmp0_o #15 acmp1_o #15 gpio_em4wu12 32 pc11 busay [adc0: aport1ych11 acmp0: aport1ych11 acmp1: aport1ych11] busbx [adc0: aport2xch11 acmp0: aport2xch11 acmp1: aport2xch11] tim0_cc0 #16 tim0_cc1 #15 tim0_cc2 #14 tim0_cdti0 #13 tim0_cdti1 #12 tim0_cdti2 #11 tim1_cc0 #16 tim1_cc1 #15 tim1_cc2 #14 tim1_cc3 #13 le- tim0_out0 #16 letim0_out1 #15 pcnt0_s0in #16 pcnt0_s1in #15 us0_tx #16 us0_rx #15 us0_clk #14 us0_cs #13 us0_cts #12 us0_rts #11 leu0_tx #16 leu0_rx #15 i2c0_sda #16 i2c0_scl #15 frc_dclk #16 frc_dout #15 frc_dframe #14 modem_dclk #16 modem_din #15 modem_dout #14 modem_ant0 #13 modem_ant1 #12 cmu_clk0 #3 prs_ch0 #13 prs_ch9 #16 prs_ch10 #5 prs_ch11 #4 acmp0_o #16 acmp1_o #16 dbg_swo #3 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 72
6.1.1 efr32mg1 qfn32 2.4 ghz gpio overview the gpio pins are organized as 16-bit ports indicated by letters (a, b, c...), and the individual pins on each port are indicated by a number from 15 down to 0. table 6.2. qfn32 2.4 ghz gpio pinout port pin 15 pin 14 pin 13 pin 12 pin 11 pin 10 pin 9 pin 8 pin 7 pin 6 pin 5 pin 4 pin 3 pin 2 pin 1 pin 0 port a - - - - - - - - - - - - - - pa1 pa0 port b pb15 pb14 pb13 (5v) pb12 (5v) pb11 (5v) - - - - - - - - - - - port c - - - - pc11 (5v) pc10 (5v) - - - - - - - - - - port d pd15 (5v) pd14 (5v) pd13 (5v) - - - - - - - - - - - - - port f - - - - - - - - - - - - pf3 (5v) pf2 (5v) pf1 (5v) pf0 (5v) note: 1. gpio with 5v tolerance are indicated by (5v). 2. the pins pb13, pb12, pb11, pd15, pd14, and pd13 will not be 5v tolerant on all future devices. in order to preserve upgrade options with full hardware compatibility, do not use these pins with 5v domains. efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 73
6.2 alternate functionality pinout a wide selection of alternate functionality is available for multiplexing to various pins. the following table shows the name of the alter- nate functionality in the first column, followed by columns showing the possible location bitfield settings. note: some functionality, such as analog interfaces, do not have alternate settings or a location bitfield. in these cases, the pinout is shown in the column corresponding to location 0. table 6.3. alternate functionality overview alternate location functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 description acmp0_o 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 analog comparator acmp0, digital out- put. acmp1_o 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 analog comparator acmp1, digital out- put. adc0_extn 0: pa0 analog to digital converter adc0 ex- ternal reference in- put negative pin adc0_extp 0: pa1 analog to digital converter adc0 ex- ternal reference in- put positive pin cmu_clk0 0: pa1 1: pb15 3: pc11 5: pd14 6: pf2 clock management unit, clock output number 0. cmu_clk1 0: pa0 1: pb14 3: pc10 5: pd15 6: pf3 clock management unit, clock output number 1. dbg_swclktck 0: pf0 debug-interface serial wire clock input and jtag test clock. note that this func- tion is enabled to the pin out of reset, and has a built-in pull down. dbg_swdiotms 0: pf1 debug-interface serial wire data in- put / output and jtag test mode select. note that this func- tion is enabled to the pin out of reset, and has a built-in pull up. efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 74
alternate location functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 description dbg_swo 0: pf2 1: pb13 2: pd15 3: pc11 debug-interface serial wire viewer output. note that this func- tion is not enabled after reset, and must be enabled by software to be used. dbg_tdi 0: pf3 debug-interface jtag test data in. note that this func- tion is enabled to pin out of reset, and has a built-in pull up. dbg_tdo 0: pf2 debug-interface jtag test data out. note that this func- tion is enabled to pin out of reset. frc_dclk 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 frame controller, data sniffer clock. frc_dframe 4: pb11 5: pb12 6: pb13 7: pb14 8: pb15 13: pc10 14: pc11 19: pd13 20: pd14 21: pd15 22: pf0 23: pf1 24: pf2 25: pf3 30: pa0 31: pa1 frame controller, data sniffer frame active frc_dout 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 frame controller, data sniffer out- put. gpio_em4wu0 0: pf2 pin can be used to wake the system up from em4 gpio_em4wu4 0: pd14 pin can be used to wake the system up from em4 gpio_em4wu9 0: pb13 pin can be used to wake the system up from em4 gpio_em4wu12 0: pc10 pin can be used to wake the system up from em4 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 75
alternate location functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 description i2c0_scl 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 i2c0 serial clock line input / output. i2c0_sda 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 i2c0 serial data in- put / output. letim0_out0 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 low energy timer letim0, output channel 0. letim0_out1 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 low energy timer letim0, output channel 1. leu0_rx 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 leuart0 receive input. leu0_tx 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 leuart0 transmit output. also used as receive input in half duplex commu- nication. lfxtal_n 0: pb14 low frequency crystal (typically 32.768 khz) nega- tive pin. also used as an optional ex- ternal clock input pin. lfxtal_p 0: pb15 low frequency crystal (typically 32.768 khz) posi- tive pin. modem_ant0 3: pb11 4: pb12 5: pb13 6: pb14 7: pb15 12: pc10 13: pc11 18: pd13 19: pd14 20: pd15 21: pf0 22: pf1 23: pf2 24: pf3 29: pa0 30: pa1 modem antenna control output 0, used for antenna diversity. modem_ant1 2: pb11 3: pb12 4: pb13 5: pb14 6: pb15 11: pc10 12: pc11 17: pd13 18: pd14 19: pd15 20: pf0 21: pf1 22: pf2 23: pf3 28: pa0 29: pa1 modem antenna control output 1, used for antenna diversity. modem_dclk 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 modem data clock out. modem_din 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 modem data in. efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 76
alternate location functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 description modem_dout 4: pb11 5: pb12 6: pb13 7: pb14 8: pb15 13: pc10 14: pc11 19: pd13 20: pd14 21: pd15 22: pf0 23: pf1 24: pf2 25: pf3 30: pa0 31: pa1 modem data out. pcnt0_s0in 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 pulse counter pcnt0 input num- ber 0. pcnt0_s1in 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 pulse counter pcnt0 input num- ber 1. prs_ch0 0: pf0 1: pf1 2: pf2 3: pf3 12: pc10 13: pc11 peripheral reflex system prs, chan- nel 0. prs_ch1 0: pf1 1: pf2 2: pf3 7: pf0 peripheral reflex system prs, chan- nel 1. prs_ch2 0: pf2 1: pf3 6: pf0 7: pf1 peripheral reflex system prs, chan- nel 2. prs_ch3 0: pf3 5: pf0 6: pf1 7: pf2 12: pd13 13: pd14 14: pd15 peripheral reflex system prs, chan- nel 3. prs_ch4 4: pd13 5: pd14 6: pd15 peripheral reflex system prs, chan- nel 4. prs_ch5 3: pd13 4: pd14 5: pd15 peripheral reflex system prs, chan- nel 5. prs_ch6 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pd13 16: pd14 17: pd15 peripheral reflex system prs, chan- nel 6. prs_ch7 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 10: pa0 peripheral reflex system prs, chan- nel 7. prs_ch8 4: pb11 5: pb12 6: pb13 7: pb14 8: pb15 9: pa0 10: pa1 peripheral reflex system prs, chan- nel 8. prs_ch9 3: pb11 4: pb12 5: pb13 6: pb14 7: pb15 8: pa0 9: pa1 15: pc10 16: pc11 peripheral reflex system prs, chan- nel 9. efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 77
alternate location functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 description prs_ch10 4: pc10 5: pc11 peripheral reflex system prs, chan- nel 10. prs_ch11 3: pc10 4: pc11 peripheral reflex system prs, chan- nel 11. tim0_cc0 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 timer 0 capture compare input / output channel 0. tim0_cc1 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 timer 0 capture compare input / output channel 1. tim0_cc2 4: pb11 5: pb12 6: pb13 7: pb14 8: pb15 13: pc10 14: pc11 19: pd13 20: pd14 21: pd15 22: pf0 23: pf1 24: pf2 25: pf3 30: pa0 31: pa1 timer 0 capture compare input / output channel 2. tim0_cdti0 3: pb11 4: pb12 5: pb13 6: pb14 7: pb15 12: pc10 13: pc11 18: pd13 19: pd14 20: pd15 21: pf0 22: pf1 23: pf2 24: pf3 29: pa0 30: pa1 timer 0 compli- mentary dead time insertion channel 0. tim0_cdti1 2: pb11 3: pb12 4: pb13 5: pb14 6: pb15 11: pc10 12: pc11 17: pd13 18: pd14 19: pd15 20: pf0 21: pf1 22: pf2 23: pf3 28: pa0 29: pa1 timer 0 compli- mentary dead time insertion channel 1. tim0_cdti2 1: pb11 2: pb12 3: pb13 4: pb14 5: pb15 10: pc10 11: pc11 16: pd13 17: pd14 18: pd15 19: pf0 20: pf1 21: pf2 22: pf3 27: pa0 28: pa1 timer 0 compli- mentary dead time insertion channel 2. tim1_cc0 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 timer 1 capture compare input / output channel 0. tim1_cc1 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 timer 1 capture compare input / output channel 1. tim1_cc2 4: pb11 5: pb12 6: pb13 7: pb14 8: pb15 13: pc10 14: pc11 19: pd13 20: pd14 21: pd15 22: pf0 23: pf1 24: pf2 25: pf3 30: pa0 31: pa1 timer 1 capture compare input / output channel 2. tim1_cc3 3: pb11 4: pb12 5: pb13 6: pb14 7: pb15 12: pc10 13: pc11 18: pd13 19: pd14 20: pd15 21: pf0 22: pf1 23: pf2 24: pf3 29: pa0 30: pa1 timer 1 capture compare input / output channel 3. us0_clk 4: pb11 5: pb12 6: pb13 7: pb14 8: pb15 13: pc10 14: pc11 19: pd13 20: pd14 21: pd15 22: pf0 23: pf1 24: pf2 25: pf3 30: pa0 31: pa1 usart0 clock in- put / output. efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 78
alternate location functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 description us0_cs 3: pb11 4: pb12 5: pb13 6: pb14 7: pb15 12: pc10 13: pc11 18: pd13 19: pd14 20: pd15 21: pf0 22: pf1 23: pf2 24: pf3 29: pa0 30: pa1 usart0 chip se- lect input / output. us0_cts 2: pb11 3: pb12 4: pb13 5: pb14 6: pb15 11: pc10 12: pc11 17: pd13 18: pd14 19: pd15 20: pf0 21: pf1 22: pf2 23: pf3 28: pa0 29: pa1 usart0 clear to send hardware flow control input. us0_rts 1: pb11 2: pb12 3: pb13 4: pb14 5: pb15 10: pc10 11: pc11 16: pd13 17: pd14 18: pd15 19: pf0 20: pf1 21: pf2 22: pf3 27: pa0 28: pa1 usart0 request to send hardware flow control output. us0_rx 0: pa1 5: pb11 6: pb12 7: pb13 8: pb14 9: pb15 14: pc10 15: pc11 20: pd13 21: pd14 22: pd15 23: pf0 24: pf1 25: pf2 26: pf3 31: pa0 usart0 asynchro- nous receive. usart0 synchro- nous mode master input / slave out- put (miso). us0_tx 0: pa0 1: pa1 6: pb11 7: pb12 8: pb13 9: pb14 10: pb15 15: pc10 16: pc11 21: pd13 22: pd14 23: pd15 24: pf0 25: pf1 26: pf2 27: pf3 usart0 asynchro- nous transmit. al- so used as receive input in half duplex communication. usart0 synchro- nous mode master output / slave in- put (mosi). efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 79
6.3 analog port (aport) the analog port (aport) is an infrastructure used to connect chip pins with on-chip analog clients such as analog comparators, adcs, and dacs. the aport consists of wires, switches, and control needed to configurably implement the routes. please see the device reference manual for a complete description. pf0 busax pf2 pc10 busby pf1 busay pf3 pc11 busbx pb14 buscx pd14 pa0 pb12 busdy pd13 buscy pd15 pa1 pb11 pb13 pb15 busdx acmp0 1x 1y 2x 2y 3x 3y 4x 4y acmp1 1x 1y 2x 2y 3x 3y 4x 4y adc0 1x 1y 2x 2y 3x 3y 4x 4y idac0 1x 1y figure 6.2. efr32mg1 aport table 6.4. aport client map analog module analog module channel shared bus pin acmp0 aport1xch10 busax pc10 aport1xch16 pf0 aport1xch18 pf2 acmp0 aport1ych11 busay pc11 aport1ych17 pf1 aport1ych19 pf3 acmp0 aport2xch11 busbx pc11 aport2xch17 pf1 aport2xch19 pf3 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 80
analog module analog module channel shared bus pin acmp0 aport2ych10 busby pc10 aport2ych16 pf0 aport2ych18 pf2 acmp0 aport3xch6 buscx pd14 aport3xch8 pa0 aport3xch28 pb12 aport3xch30 pb14 acmp0 aport3ych5 buscy pd13 aport3ych7 pd15 aport3ych9 pa1 aport3ych27 pb11 aport3ych29 pb13 aport3ych31 pb15 acmp0 aport4xch5 busdx pd13 aport4xch7 pd15 aport4xch9 pa1 aport4xch27 pb11 aport4xch29 pb13 aport4xch31 pb15 acmp0 aport4ych6 busdy pd14 aport4ych8 pa0 aport4ych28 pb12 aport4ych30 pb14 acmp1 aport1xch10 busax pc10 aport1xch16 pf0 aport1xch18 pf2 acmp1 aport1ych11 busay pc11 aport1ych17 pf1 aport1ych19 pf3 acmp1 aport2xch11 busbx pc11 aport2xch17 pf1 aport2xch19 pf3 acmp1 aport2ych10 busby pc10 aport2ych16 pf0 aport2ych18 pf2 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 81
analog module analog module channel shared bus pin acmp1 aport3xch6 buscx pd14 aport3xch8 pa0 aport3xch28 pb12 aport3xch30 pb14 acmp1 aport3ych5 buscy pd13 aport3ych7 pd15 aport3ych9 pa1 aport3ych27 pb11 aport3ych29 pb13 aport3ych31 pb15 acmp1 aport4xch5 busdx pd13 aport4xch7 pd15 aport4xch9 pa1 aport4xch27 pb11 aport4xch29 pb13 aport4xch31 pb15 acmp1 aport4ych6 busdy pd14 aport4ych8 pa0 aport4ych28 pb12 aport4ych30 pb14 adc0 aport1xch10 busax pc10 aport1xch16 pf0 aport1xch18 pf2 adc0 aport1ych11 busay pc11 aport1ych17 pf1 aport1ych19 pf3 adc0 aport2xch11 busbx pc11 aport2xch17 pf1 aport2xch19 pf3 adc0 aport2ych10 busby pc10 aport2ych16 pf0 aport2ych18 pf2 adc0 aport3xch6 buscx pd14 aport3xch8 pa0 aport3xch28 pb12 aport3xch30 pb14 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 82
analog module analog module channel shared bus pin adc0 aport3ych5 buscy pd13 aport3ych7 pd15 aport3ych9 pa1 aport3ych27 pb11 aport3ych29 pb13 aport3ych31 pb15 adc0 aport4xch5 busdx pd13 aport4xch7 pd15 aport4xch9 pa1 aport4xch27 pb11 aport4xch29 pb13 aport4xch31 pb15 adc0 aport4ych6 busdy pd14 aport4ych8 pa0 aport4ych28 pb12 aport4ych30 pb14 idac0 aport1xch6 buscx pd14 aport1xch8 pa0 aport1xch28 pb12 aport1xch30 pb14 idac0 aport1ych5 buscy pd13 aport1ych7 pd15 aport1ych9 pa1 aport1ych27 pb11 aport1ych29 pb13 aport1ych31 pb15 efr32mg1 mighty gecko soc with integrated serial flash data sheet pin definitions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 83
7. qfn32 package specifications 7.1 qfn32 package dimensions figure 7.1. qfn32 package drawing efr32mg1 mighty gecko soc with integrated serial flash data sheet qfn32 package specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 84
table 7.1. qfn32 package dimensions dimension min typ max a 0.80 0.85 0.90 a1 0.00 0.02 0.05 a3 0.20 ref b 0.18 0.25 0.30 d/e 4.90 5.00 5.10 d2/e2 3.40 3.50 3.60 e 0.50 bsc l 0.30 0.40 0.50 k 0.20 r 0.09 0.14 aaa 0.15 bbb 0.10 ccc 0.10 ddd 0.05 eee 0.08 fff 0.10 note: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to the jedec solid state outline mo-220, variation vkkd-4. 4. recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components. efr32mg1 mighty gecko soc with integrated serial flash data sheet qfn32 package specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 85
7.2 qfn32 pcb land pattern figure 7.2. qfn32 pcb land pattern drawing efr32mg1 mighty gecko soc with integrated serial flash data sheet qfn32 package specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 86
table 7.2. qfn32 pcb land pattern dimensions dimension typ s1 4.01 s 4.01 l1 3.50 w1 3.50 e 0.50 w 0.26 l 0.86 note: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. this land pattern design is based on the ipc-7351 guidelines. 3. all metal pads are to be non-solder mask defined (nsmd). clearance between the solder mask and the metal pad is to be 60 m minimum, all the way around the pad. 4. a stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 5. the stencil thickness should be 0.125 mm (5 mils). 6. the ratio of stencil aperture to land pad size can be 1:1 for all perimeter pads. 7. a 3x3 array of 0.85 mm square openings on a 1.00 mm pitch can be used for the center ground pad. 8. a no-clean, type-3 solder paste is recommended. 9. the recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components. efr32mg1 mighty gecko soc with integrated serial flash data sheet qfn32 package specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 87
7.3 qfn32 package marking efr32 ppppppppp yywwtttttt figure 7.3. qfn32 package marking the package marking consists of: ? ppppppppp C the part number designation. 1. family code (b | m | f) 2. g (gecko) 3. series (1, 2,...) 4. performance grade (p | b | v) 5. feature code (1 to 7) 6. trx code (3 = txrx | 2= rx | 1 = tx) 7. band (1 = sub-ghz | 2 = 2.4 ghz | 3 = dual-band) 8. flash (g = 256k | f = 128k | e = 64k | d = 32k) 9. temperature grade (g = -40 to 85 | i = -40 to 125) ? yy C the last 2 digits of the assembly year. ? ww C the 2-digit workweek when the device was assembled. ? tttttt C a trace or manufacturing code. the first letter is the device revision. efr32mg1 mighty gecko soc with integrated serial flash data sheet qfn32 package specifications silabs.com | smart. connected. energy-friendly. rev. 1.0 | 88
8. revision history 8.1 revision 1.0 2016-jul-22 ? added -i temperature grade opn's and associated sections ? electrical characteristics: minimum and maximum value statement changed to cover full operating temperature range. ? finalized specification tables. tables with condition/min/typ/max or footnote changes include: ? absolute maximum ratings ? general operating conditions ? dc-dc converter ? current consumption using radio 3.3v with dc-dc ? rf transmitter general characteristics for 2.4 ghz band ? rf receiver general characteristics for 2.4 ghz band ? rf receiver characteristics for bluetooth smart in the 2.4 ghz band ? rf transmitter characteristics for 802.15.4 dsss-oqpsk in the 2.4 ghz band ? rf receiver characteristics for 802.15.4 dsss-oqpsk in the 2.4 ghz band ? lfrco ? hfrco and auxhfrco ? primary flash memory characteristics ? gpio ? adc ? idac ? updated typical performance graphs. ? added external ground note to 2g4rf_ion pin descriptions. ? added note for 5v tolerance to pinout gpio overview sections. ? updated opn decoder with latest revision. ? updated package marking text with latest descriptions. 8.2 revision 0.95 2016-05-12 ? all opns changed to rev c0. note the following: ? all opns ending in -b0 are engineering samples based on an older revision of silicon and are being removed from the opn table. these older revisions should be used for evaluation only and will not be supported for production. ? opns ending in -c0 are the current revision of silicon and are intended for production. ? electrical specification tables updated with latest characterization data and production test limits. 8.3 revision 0.2 2016-03-29 ? initial version. efr32mg1 mighty gecko soc with integrated serial flash data sheet revision history silabs.com | smart. connected. energy-friendly. rev. 1.0 | 89
table of contents 1. feature list ................................ 1 2. ordering information ............................ 2 3. system overview .............................. 4 3.1 introduction ............................... 4 3.2 radio ................................. 4 3.2.1 antenna interface ............................ 4 3.2.2 fractional-n frequency synthesizer ...................... 5 3.2.3 receiver architecture ........................... 5 3.2.4 transmitter architecture .......................... 5 3.2.5 wake on radio ............................. 5 3.2.6 rfsense .............................. 5 3.2.7 flexible frame handling .......................... 6 3.2.8 packet and state trace .......................... 6 3.2.9 data buffering ............................. 6 3.2.10 radio controller (rac) .......................... 6 3.2.11 random number generator ........................ 6 3.3 power ................................ 7 3.3.1 energy management unit (emu) ....................... 7 3.3.2 dc-dc converter ............................ 7 3.4 general purpose input/output (gpio) ...................... 7 3.5 clocking ................................ 7 3.5.1 clock management unit (cmu) ....................... 7 3.5.2 internal and external oscillators ....................... 7 3.6 counters/timers and pwm ......................... 8 3.6.1 timer/counter (timer) .......................... 8 3.6.2 real time counter and calendar (rtcc) .................... 8 3.6.3 low energy timer (letimer) ........................ 8 3.6.4 ultra low power wake-up timer (cryotimer) ................. 8 3.6.5 pulse counter (pcnt) .......................... 8 3.6.6 watchdog timer (wdog) ......................... 8 3.7 communications and other digital peripherals ................... 8 3.7.1 universal synchronous/asynchronous receiver/transmitter (usart) .......... 8 3.7.2 low energy universal asynchronous receiver/transmitter (leuart) .......... 8 3.7.3 inter-integrated circuit interface (i 2 c) ..................... 9 3.7.4 peripheral reflex system (prs) ....................... 9 3.8 security features ............................. 9 3.8.1 gpcrc (general purpose cyclic redundancy check) ............... 9 3.8.2 crypto accelerator (crypto) ........................ 9 3.9 analog ................................ 9 3.9.1 analog port (aport) .......................... 9 3.9.2 analog comparator (acmp) ........................ 9 3.9.3 analog to digital converter (adc) ...................... 9 3.9.4 digital to analog current converter (idac) ................... 10 table of contents 90
3.10 reset management unit (rmu) ....................... 10 3.11 core and memory ............................ 10 3.11.1 processor core ............................ 10 3.11.2 serial flash ............................. 10 3.11.3 memory system controller (msc) ...................... 10 3.11.4 linked direct memory access controller (ldma) ................. 10 3.12 memory map .............................. 11 3.13 configuration summary .......................... 12 4. electrical specifications .......................... 13 4.1 electrical characteristics .......................... 13 4.1.1 absolute maximum ratings ........................ 14 4.1.2 operating conditions ........................... 15 4.1.2.1 general operating conditions ....................... 15 4.1.3 thermal characteristics .......................... 16 4.1.4 dc-dc converter ............................ 17 4.1.5 current consumption ........................... 19 4.1.5.1 current consumption 3.3 v without dc-dc converter ............... 19 4.1.5.2 current consumption 3.3 v using dc-dc converter ............... 20 4.1.5.3 current consumption using radio ..................... 21 4.1.6 wake up times ............................. 22 4.1.7 brown out detector ........................... 22 4.1.8 frequency synthesizer characteristics ..................... 23 4.1.9 2.4 ghz rf transceiver characteristics .................... 24 4.1.9.1 rf transmitter general characteristics for the 2.4 ghz band ............ 24 4.1.9.2 rf receiver general characteristics for the 2.4 ghz band ............. 25 4.1.9.3 rf transmitter characteristics for bluetooth smart in the 2.4 ghz band ......... 26 4.1.9.4 rf receiver characteristics for bluetooth smart in the 2.4 ghz band .......... 28 4.1.9.5 rf transmitter characteristics for 802.15.4 o-qpsk dsss in the 2.4 ghz band ...... 30 4.1.9.6 rf receiver characteristics for 802.15.4 o-qpsk dsss in the 2.4 ghz band ....... 33 4.1.10 modem features ............................ 34 4.1.11 oscillators .............................. 35 4.1.11.1 lfxo ............................... 35 4.1.11.2 hfxo ............................... 36 4.1.11.3 lfrco .............................. 36 4.1.11.4 hfrco and auxhfrco ........................ 37 4.1.11.5 ulfrco .............................. 37 4.1.12 primary flash memory characteristics .................... 38 4.1.13 serial flash memory characteristics ..................... 38 4.1.14 gpio ................................ 39 4.1.15 vmon ............................... 40 4.1.16 adc ................................ 41 4.1.17 idac ................................ 44 4.1.18 analog comparator (acmp) ........................ 46 4.1.19 i2c ................................ 48 4.1.20 usart spi ............................. 50 4.2 typical performance curves ......................... 51 4.2.1 supply current ............................. 52 4.2.2 dc-dc converter ............................ 54 table of contents 91
4.2.3 internal oscillators ............................ 56 4.2.4 2.4 ghz radio ............................. 62 5. typical connection diagrams ........................ 64 5.1 power ................................ 64 5.2 rf matching networks ........................... 65 5.3 other connections ............................ 65 6. pin definitions .............................. 66 6.1 efr32mg1 qfn32 2.4 ghz definition ..................... 66 6.1.1 efr32mg1 qfn32 2.4 ghz gpio overview .................. 73 6.2 alternate functionality pinout ........................ 74 6.3 analog port (aport) ........................... 80 7. qfn32 package specifications ........................ 84 7.1 qfn32 package dimensions ......................... 84 7.2 qfn32 pcb land pattern .......................... 86 7.3 qfn32 package marking .......................... 88 8. revision history ............................. 89 8.1 revision 1.0 .............................. 89 8.2 revision 0.95 .............................. 89 8.3 revision 0.2 .............................. 89 table of contents .............................. 90 table of contents 92
http://www.silabs.com silicon laboratories inc. 400 west cesar chavez austin, tx 78701 usa simplicity studio one-click access to mcu and wireless tools, documentation, software, source code libraries & more. available for windows, mac and linux! iot portfolio www.silabs.com/iot sw/hw www.silabs.com/simplicity quality www.silabs.com/quality support and community community.silabs.com disclaimer silicon laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the silicon laboratories products. characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "typical" parameters provided can and do vary in different applications. application examples described herein are for illustrative purposes only. silicon laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. silicon laboratories shall have no liability for the consequences of use of the information supplied herein. this document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. the products are not designed or authorized to be used within any life support system without the specific written consent of silicon laboratories. a "life support system" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. silicon laboratories products are not designed or authorized for military applications. silicon laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. trademark information silicon laboratories inc.? , silicon laboratories?, silicon labs?, silabs? and the silicon labs logo?, bluegiga?, bluegiga logo?, clockbuilder?, cmems?, dspll?, efm?, efm32?, efr, ember?, energy micro, energy micro logo and combinations thereof, "the world?s most energy friendly microcontrollers", ember?, ezlink?, ezradio?, ezradiopro?, gecko?, isomodem?, precision32?, proslic?, simplicity studio?, siphy?, telegesis, the telegesis logo?, usbxpress? and others are trademarks or registered trademarks of silicon laborato - ries inc. arm, cortex, cortex-m3 and thumb are trademarks or registered trademarks of arm holdings. keil is a registered trademark of arm limited. all other products or brand names mentioned herein are trademarks of their respective holders.

▲Up To Search▲

Price & Availability of EFR32MG1P632F256IM32-C0

	To Download EFR32MG1P632F256IM32-C0 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .